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-rw-r--r--src/cpu/inorder/cpu.hh4
-rw-r--r--src/cpu/inorder/resources/tlb_unit.cc2
-rw-r--r--src/cpu/inorder/thread_context.hh4
3 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh
index adcd28019..f30ef128b 100644
--- a/src/cpu/inorder/cpu.hh
+++ b/src/cpu/inorder/cpu.hh
@@ -103,8 +103,8 @@ class InOrderCPU : public BaseCPU
Params *cpu_params;
- TheISA::ITB * itb;
- TheISA::DTB * dtb;
+ TheISA::TLB * itb;
+ TheISA::TLB * dtb;
public:
enum Status {
diff --git a/src/cpu/inorder/resources/tlb_unit.cc b/src/cpu/inorder/resources/tlb_unit.cc
index 8f8ba144e..b3757d707 100644
--- a/src/cpu/inorder/resources/tlb_unit.cc
+++ b/src/cpu/inorder/resources/tlb_unit.cc
@@ -99,7 +99,7 @@ TLBUnit::execute(int slot_idx)
{
tlb_req->fault =
this->cpu->itb->translateAtomic(tlb_req->memReq,
- cpu->thread[tid]->getTC());
+ cpu->thread[tid]->getTC(), false, true);
if (tlb_req->fault != NoFault) {
DPRINTF(InOrderTLB, "[tid:%i]: %s encountered while translating "
diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh
index 2fb2ed85f..3a1cb1379 100644
--- a/src/cpu/inorder/thread_context.hh
+++ b/src/cpu/inorder/thread_context.hh
@@ -65,10 +65,10 @@ class InOrderThreadContext : public ThreadContext
/** Returns a pointer to the ITB. */
- TheISA::ITB *getITBPtr() { return cpu->itb; }
+ TheISA::TLB *getITBPtr() { return cpu->itb; }
/** Returns a pointer to the DTB. */
- TheISA::DTB *getDTBPtr() { return cpu->dtb; }
+ TheISA::TLB *getDTBPtr() { return cpu->dtb; }
System *getSystemPtr() { return cpu->system; }