diff options
Diffstat (limited to 'src/cpu/kvm')
-rw-r--r-- | src/cpu/kvm/base.cc | 5 | ||||
-rw-r--r-- | src/cpu/kvm/base.hh | 3 | ||||
-rw-r--r-- | src/cpu/kvm/x86_cpu.cc | 5 | ||||
-rw-r--r-- | src/cpu/kvm/x86_cpu.hh | 3 |
4 files changed, 4 insertions, 12 deletions
diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc index 95d91467e..e09c4b7f2 100644 --- a/src/cpu/kvm/base.cc +++ b/src/cpu/kvm/base.cc @@ -118,8 +118,6 @@ BaseKvmCPU::init() // initialize CPU, including PC if (FullSystem && !switchedOut()) TheISA::initCPU(tc, tc->contextId()); - - mmio_req.setThreadContext(tc->contextId(), 0); } void @@ -995,7 +993,8 @@ BaseKvmCPU::doMMIOAccess(Addr paddr, void *data, int size, bool write) ThreadContext *tc(thread->getTC()); syncThreadContext(); - mmio_req.setPhys(paddr, size, Request::UNCACHEABLE, dataMasterId()); + Request mmio_req(paddr, size, Request::UNCACHEABLE, dataMasterId()); + mmio_req.setThreadContext(tc->contextId(), 0); // Some architectures do need to massage physical addresses a bit // before they are inserted into the memory system. This enables // APIC accesses on x86 and m5ops where supported through a MMIO diff --git a/src/cpu/kvm/base.hh b/src/cpu/kvm/base.hh index 249398293..dac4934cb 100644 --- a/src/cpu/kvm/base.hh +++ b/src/cpu/kvm/base.hh @@ -574,9 +574,6 @@ class BaseKvmCPU : public BaseCPU /** Unused dummy port for the instruction interface */ KVMCpuPort instPort; - /** Pre-allocated MMIO memory request */ - Request mmio_req; - /** * Is the gem5 context dirty? Set to true to force an update of * the KVM vCPU state upon the next call to kvmRun(). diff --git a/src/cpu/kvm/x86_cpu.cc b/src/cpu/kvm/x86_cpu.cc index 3e736a913..34b51f137 100644 --- a/src/cpu/kvm/x86_cpu.cc +++ b/src/cpu/kvm/x86_cpu.cc @@ -554,8 +554,6 @@ X86KvmCPU::startup() updateCPUID(); - io_req.setThreadContext(tc->contextId(), 0); - // TODO: Do we need to create an identity mapped TSS area? We // should call kvm.vm.setTSSAddress() here in that case. It should // only be needed for old versions of the virtualization @@ -1346,8 +1344,9 @@ X86KvmCPU::handleKvmExitIO() pAddr = X86ISA::x86IOAddress(port); } - io_req.setPhys(pAddr, kvm_run.io.size, Request::UNCACHEABLE, + Request io_req(pAddr, kvm_run.io.size, Request::UNCACHEABLE, dataMasterId()); + io_req.setThreadContext(tc->contextId(), 0); const MemCmd cmd(isWrite ? MemCmd::WriteReq : MemCmd::ReadReq); // Temporarily lock and migrate to the event queue of the diff --git a/src/cpu/kvm/x86_cpu.hh b/src/cpu/kvm/x86_cpu.hh index bfd090ff7..18471040c 100644 --- a/src/cpu/kvm/x86_cpu.hh +++ b/src/cpu/kvm/x86_cpu.hh @@ -234,9 +234,6 @@ class X86KvmCPU : public BaseKvmCPU */ void handleIOMiscReg32(int miscreg); - /** Reusable IO request */ - Request io_req; - /** Cached intersection of supported MSRs */ mutable Kvm::MSRIndexVector cachedMsrIntersection; |