summaryrefslogtreecommitdiff
path: root/src/cpu/minor/MinorCPU.py
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/minor/MinorCPU.py')
-rw-r--r--src/cpu/minor/MinorCPU.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/minor/MinorCPU.py b/src/cpu/minor/MinorCPU.py
index 07953cf5a..9ab7b0b39 100644
--- a/src/cpu/minor/MinorCPU.py
+++ b/src/cpu/minor/MinorCPU.py
@@ -46,7 +46,7 @@ from m5.proxy import *
from m5.SimObject import SimObject
from BaseCPU import BaseCPU
from DummyChecker import DummyChecker
-from BranchPredictor import BranchPredictor
+from BranchPredictor import *
from TimingExpr import TimingExpr
from FuncUnit import OpClass
@@ -266,7 +266,7 @@ class MinorCPU(BaseCPU):
enableIdling = Param.Bool(True,
"Enable cycle skipping when the processor is idle\n");
- branchPred = Param.BranchPredictor(BranchPredictor(
+ branchPred = Param.BranchPredictor(TournamentBP(
numThreads = Parent.numThreads), "Branch Predictor")
def addCheckerCpu(self):