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-rw-r--r--src/cpu/o3/FUPool.py14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/cpu/o3/FUPool.py b/src/cpu/o3/FUPool.py
index 1461b405c..55fb82f84 100644
--- a/src/cpu/o3/FUPool.py
+++ b/src/cpu/o3/FUPool.py
@@ -1,3 +1,15 @@
+# Copyright (c) 2017 ARM Limited
+# All rights reserved
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
# Copyright (c) 2006-2007 The Regents of The University of Michigan
# All rights reserved.
#
@@ -38,4 +50,4 @@ class FUPool(SimObject):
class DefaultFUPool(FUPool):
FUList = [ IntALU(), IntMultDiv(), FP_ALU(), FP_MultDiv(), ReadPort(),
- SIMD_Unit(), WritePort(), RdWrPort(), IprPort() ]
+ SIMD_Unit(), PredALU(), WritePort(), RdWrPort(), IprPort() ]