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-rw-r--r--src/cpu/o3/FuncUnitConfig.py11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/cpu/o3/FuncUnitConfig.py b/src/cpu/o3/FuncUnitConfig.py
index b8be400b5..f0c70f55a 100644
--- a/src/cpu/o3/FuncUnitConfig.py
+++ b/src/cpu/o3/FuncUnitConfig.py
@@ -68,6 +68,8 @@ class FP_ALU(FUDesc):
class FP_MultDiv(FUDesc):
opList = [ OpDesc(opClass='FloatMult', opLat=4),
+ OpDesc(opClass='FloatMultAcc', opLat=5),
+ OpDesc(opClass='FloatMisc', opLat=3),
OpDesc(opClass='FloatDiv', opLat=12, pipelined=False),
OpDesc(opClass='FloatSqrt', opLat=24, pipelined=False) ]
count = 2
@@ -96,15 +98,18 @@ class SIMD_Unit(FUDesc):
count = 4
class ReadPort(FUDesc):
- opList = [ OpDesc(opClass='MemRead') ]
+ opList = [ OpDesc(opClass='MemRead'),
+ OpDesc(opClass='FloatMemRead') ]
count = 0
class WritePort(FUDesc):
- opList = [ OpDesc(opClass='MemWrite') ]
+ opList = [ OpDesc(opClass='MemWrite'),
+ OpDesc(opClass='FloatMemWrite') ]
count = 0
class RdWrPort(FUDesc):
- opList = [ OpDesc(opClass='MemRead'), OpDesc(opClass='MemWrite') ]
+ opList = [ OpDesc(opClass='MemRead'), OpDesc(opClass='MemWrite'),
+ OpDesc(opClass='FloatMemRead'), OpDesc(opClass='FloatMemWrite')]
count = 4
class IprPort(FUDesc):