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-rw-r--r--src/cpu/o3/O3CPU.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py
index 371433eef..1a97faced 100644
--- a/src/cpu/o3/O3CPU.py
+++ b/src/cpu/o3/O3CPU.py
@@ -169,6 +169,7 @@ class DerivO3CPU(BaseCPU):
"The scheme specificed for simulation")
needsTSO = Param.Bool(False, "Enable TSO Memory model")
allowSpecBuffHit = Param.Bool(True, "Enable hit/reuse spec buffer entries")
+ useIFT = Param.Bool(False, "use IFT to filter")
def addCheckerCpu(self):
if buildEnv['TARGET_ISA'] in ['arm']: