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Diffstat (limited to 'src/cpu/o3/O3CPU.py')
-rw-r--r-- | src/cpu/o3/O3CPU.py | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py index 4f720a8f6..f46388b4c 100644 --- a/src/cpu/o3/O3CPU.py +++ b/src/cpu/o3/O3CPU.py @@ -38,6 +38,18 @@ class DerivO3CPU(BaseCPU): type = 'DerivO3CPU' cxx_header = 'cpu/o3/deriv.hh' + @classmethod + def memory_mode(cls): + return 'timing' + + @classmethod + def require_caches(cls): + return True + + @classmethod + def support_take_over(cls): + return True + activity = Param.Unsigned(0, "Initial count") cachePorts = Param.Unsigned(200, "Cache Ports") |