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-rw-r--r--src/cpu/o3/O3CPU.py7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py
index b8152f663..f6c395aed 100644
--- a/src/cpu/o3/O3CPU.py
+++ b/src/cpu/o3/O3CPU.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2016 ARM Limited
+# Copyright (c) 2016, 2019 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -48,6 +48,9 @@ from FUPool import *
from O3Checker import O3Checker
from BranchPredictor import *
+class FetchPolicy(ScopedEnum):
+ vals = [ 'SingleThread', 'RoundRobin', 'Branch', 'IQCount', 'LSQCount' ]
+
class DerivO3CPU(BaseCPU):
type = 'DerivO3CPU'
cxx_header = 'cpu/o3/deriv.hh'
@@ -147,7 +150,7 @@ class DerivO3CPU(BaseCPU):
numROBEntries = Param.Unsigned(192, "Number of reorder buffer entries")
smtNumFetchingThreads = Param.Unsigned(1, "SMT Number of Fetching Threads")
- smtFetchPolicy = Param.String('SingleThread', "SMT Fetch policy")
+ smtFetchPolicy = Param.FetchPolicy('SingleThread', "SMT Fetch policy")
smtLSQPolicy = Param.String('Partitioned', "SMT LSQ Sharing Policy")
smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter")
smtIQPolicy = Param.String('Partitioned', "SMT IQ Sharing Policy")