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-rwxr-xr-xsrc/cpu/o3/SConscript26
1 files changed, 12 insertions, 14 deletions
diff --git a/src/cpu/o3/SConscript b/src/cpu/o3/SConscript
index e65d41411..afbd4c533 100755
--- a/src/cpu/o3/SConscript
+++ b/src/cpu/o3/SConscript
@@ -52,21 +52,19 @@ if env['TARGET_ISA'] == 'alpha':
alpha/cpu_builder.cc
''')
elif env['TARGET_ISA'] == 'mips':
- sys.exit('O3 CPU does not support MIPS')
- #sources += Split('''
- # mips/dyn_inst.cc
- # mips/cpu.cc
- # mips/thread_context.cc
- # mips/cpu_builder.cc
- # ''')
+ sources += Split('''
+ mips/dyn_inst.cc
+ mips/cpu.cc
+ mips/thread_context.cc
+ mips/cpu_builder.cc
+ ''')
elif env['TARGET_ISA'] == 'sparc':
- sys.exit('O3 CPU does not support MIPS')
- #sources += Split('''
- # sparc/dyn_inst.cc
- # sparc/cpu.cc
- # sparc/thread_context.cc
- # sparc/cpu_builder.cc
- # ''')
+ sources += Split('''
+ sparc/dyn_inst.cc
+ sparc/cpu.cc
+ sparc/thread_context.cc
+ sparc/cpu_builder.cc
+ ''')
else:
sys.exit('O3 CPU does not support the \'%s\' ISA' % env['TARGET_ISA'])