diff options
Diffstat (limited to 'src/cpu/o3/alpha/cpu_impl.hh')
| -rw-r--r-- | src/cpu/o3/alpha/cpu_impl.hh | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/cpu/o3/alpha/cpu_impl.hh b/src/cpu/o3/alpha/cpu_impl.hh index c07595024..b7362fad9 100644 --- a/src/cpu/o3/alpha/cpu_impl.hh +++ b/src/cpu/o3/alpha/cpu_impl.hh @@ -31,6 +31,7 @@ #include "config/use_checker.hh" #include "arch/alpha/faults.hh" +#include "arch/alpha/isa_traits.hh" #include "base/cprintf.hh" #include "base/statistics.hh" #include "base/timebuf.hh" @@ -189,14 +190,14 @@ AlphaO3CPU<Impl>::regStats() template <class Impl> -MiscReg +TheISA::MiscReg AlphaO3CPU<Impl>::readMiscReg(int misc_reg, unsigned tid) { return this->regFile.readMiscReg(misc_reg, tid); } template <class Impl> -MiscReg +TheISA::MiscReg AlphaO3CPU<Impl>::readMiscRegWithEffect(int misc_reg, Fault &fault, unsigned tid) { @@ -298,6 +299,7 @@ template <class Impl> void AlphaO3CPU<Impl>::processInterrupts() { + using namespace TheISA; // Check for interrupts here. For now can copy the code that // exists within isa_fullsys_traits.hh. Also assume that thread 0 // is the one that handles the interrupts. @@ -409,12 +411,12 @@ AlphaO3CPU<Impl>::setSyscallReturn(SyscallReturn return_value, int tid) // return value itself in the standard return value reg (v0). if (return_value.successful()) { // no error - this->setArchIntReg(SyscallSuccessReg, 0, tid); - this->setArchIntReg(ReturnValueReg, return_value.value(), tid); + this->setArchIntReg(TheISA::SyscallSuccessReg, 0, tid); + this->setArchIntReg(TheISA::ReturnValueReg, return_value.value(), tid); } else { // got an error, return details - this->setArchIntReg(SyscallSuccessReg, (IntReg) -1, tid); - this->setArchIntReg(ReturnValueReg, -return_value.value(), tid); + this->setArchIntReg(TheISA::SyscallSuccessReg, (IntReg) -1, tid); + this->setArchIntReg(TheISA::ReturnValueReg, -return_value.value(), tid); } } #endif |