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-rw-r--r--src/cpu/o3/cpu.cc35
1 files changed, 0 insertions, 35 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 4f6d5d41c..1d7fb97c0 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -420,34 +420,6 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params)
lockFlag = false;
}
-#if !FULL_SYSTEM
-
-template <class Impl>
-TheISA::IntReg
-FullO3CPU<Impl>::getSyscallArg(int i, int tid)
-{
- assert(i < TheISA::NumArgumentRegs);
- TheISA::IntReg idx = TheISA::flattenIntIndex(this->tcBase(tid),
- TheISA::ArgumentReg[i]);
- TheISA::IntReg val = this->readArchIntReg(idx, tid);
-#if THE_ISA == SPARC_ISA
- if (bits(this->readMiscRegNoEffect(SparcISA::MISCREG_PSTATE, tid), 3, 3))
- val = bits(val, 31, 0);
-#endif
- return val;
-}
-
-template <class Impl>
-void
-FullO3CPU<Impl>::setSyscallArg(int i, TheISA::IntReg val, int tid)
-{
- assert(i < TheISA::NumArgumentRegs);
- TheISA::IntReg idx = TheISA::flattenIntIndex(this->tcBase(tid),
- TheISA::ArgumentReg[i]);
- this->setArchIntReg(idx, val, tid);
-}
-#endif
-
template <class Impl>
FullO3CPU<Impl>::~FullO3CPU()
{
@@ -1000,13 +972,6 @@ FullO3CPU<Impl>::syscall(int64_t callnum, int tid)
--(this->thread[tid]->funcExeInst);
}
-template <class Impl>
-void
-FullO3CPU<Impl>::setSyscallReturn(SyscallReturn return_value, int tid)
-{
- TheISA::setSyscallReturn(return_value, this->tcBase(tid));
-}
-
#endif
template <class Impl>