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-rw-r--r--src/cpu/o3/cpu.hh6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 5cf27df75..1289785dc 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -395,11 +395,11 @@ class FullO3CPU : public BaseO3CPU
/** Get instruction asid. */
int getInstAsid(ThreadID tid)
- { return regFile.miscRegs[tid].getInstAsid(); }
+ { return isa[tid].instAsid(); }
/** Get data asid. */
int getDataAsid(ThreadID tid)
- { return regFile.miscRegs[tid].getDataAsid(); }
+ { return isa[tid].dataAsid(); }
#else
/** Get instruction asid. */
int getInstAsid(ThreadID tid)
@@ -603,6 +603,8 @@ class FullO3CPU : public BaseO3CPU
/** Integer Register Scoreboard */
Scoreboard scoreboard;
+ TheISA::ISA isa[Impl::MaxThreads];
+
public:
/** Enum to give each stage a specific index, so when calling
* activateStage() or deactivateStage(), they can specify which stage