1 files changed, 2 insertions, 14 deletions
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 1289785dc..c077b2493 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -435,27 +435,17 @@ class FullO3CPU : public BaseO3CPU
 
     TheISA::FloatReg readFloatReg(int reg_idx);
 
-    TheISA::FloatReg readFloatReg(int reg_idx, int width);
-
     TheISA::FloatRegBits readFloatRegBits(int reg_idx);
 
-    TheISA::FloatRegBits readFloatRegBits(int reg_idx, int width);
-
     void setIntReg(int reg_idx, uint64_t val);
 
     void setFloatReg(int reg_idx, TheISA::FloatReg val);
 
-    void setFloatReg(int reg_idx, TheISA::FloatReg val, int width);
-
     void setFloatRegBits(int reg_idx, TheISA::FloatRegBits val);
 
-    void setFloatRegBits(int reg_idx, TheISA::FloatRegBits val, int width);
-
     uint64_t readArchIntReg(int reg_idx, ThreadID tid);
 
-    float readArchFloatRegSingle(int reg_idx, ThreadID tid);
-
-    double readArchFloatRegDouble(int reg_idx, ThreadID tid);
+    float readArchFloatReg(int reg_idx, ThreadID tid);
 
     uint64_t readArchFloatRegInt(int reg_idx, ThreadID tid);
 
@@ -466,9 +456,7 @@ class FullO3CPU : public BaseO3CPU
      */
     void setArchIntReg(int reg_idx, uint64_t val, ThreadID tid);
 
-    void setArchFloatRegSingle(int reg_idx, float val, ThreadID tid);
-
-    void setArchFloatRegDouble(int reg_idx, double val, ThreadID tid);
+    void setArchFloatReg(int reg_idx, float val, ThreadID tid);
 
     void setArchFloatRegInt(int reg_idx, uint64_t val, ThreadID tid);