diff options
Diffstat (limited to 'src/cpu/o3/cpu.hh')
| -rw-r--r-- | src/cpu/o3/cpu.hh | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index 19b9a34e0..4c4677615 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -401,8 +401,6 @@ class FullO3CPU : public BaseO3CPU uint64_t readIntReg(PhysRegIdPtr phys_reg); - TheISA::FloatReg readFloatReg(PhysRegIdPtr phys_reg); - TheISA::FloatRegBits readFloatRegBits(PhysRegIdPtr phys_reg); const VecRegContainer& readVecReg(PhysRegIdPtr reg_idx) const; @@ -449,8 +447,6 @@ class FullO3CPU : public BaseO3CPU void setIntReg(PhysRegIdPtr phys_reg, uint64_t val); - void setFloatReg(PhysRegIdPtr phys_reg, TheISA::FloatReg val); - void setFloatRegBits(PhysRegIdPtr phys_reg, TheISA::FloatRegBits val); void setVecReg(PhysRegIdPtr reg_idx, const VecRegContainer& val); @@ -461,9 +457,7 @@ class FullO3CPU : public BaseO3CPU uint64_t readArchIntReg(int reg_idx, ThreadID tid); - float readArchFloatReg(int reg_idx, ThreadID tid); - - uint64_t readArchFloatRegInt(int reg_idx, ThreadID tid); + uint64_t readArchFloatRegBits(int reg_idx, ThreadID tid); const VecRegContainer& readArchVecReg(int reg_idx, ThreadID tid) const; /** Read architectural vector register for modification. */ @@ -502,9 +496,7 @@ class FullO3CPU : public BaseO3CPU */ void setArchIntReg(int reg_idx, uint64_t val, ThreadID tid); - void setArchFloatReg(int reg_idx, float val, ThreadID tid); - - void setArchFloatRegInt(int reg_idx, uint64_t val, ThreadID tid); + void setArchFloatRegBits(int reg_idx, uint64_t val, ThreadID tid); void setArchVecReg(int reg_idx, const VecRegContainer& val, ThreadID tid); |