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-rw-r--r--src/cpu/o3/decode.hh13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/cpu/o3/decode.hh b/src/cpu/o3/decode.hh
index 7f5ecbc26..4a845e670 100644
--- a/src/cpu/o3/decode.hh
+++ b/src/cpu/o3/decode.hh
@@ -276,6 +276,19 @@ class DefaultDecode
/** Maximum size of the skid buffer. */
unsigned skidBufferMax;
+ /** SeqNum of Squashing Branch Delay Instruction (used for MIPS)*/
+ Addr bdelayDoneSeqNum[Impl::MaxThreads];
+
+ /** Instruction used for squashing branch (used for MIPS)*/
+ DynInstPtr squashInst[Impl::MaxThreads];
+
+ /** Tells when their is a pending delay slot inst. to send
+ * to rename. If there is, then wait squash after the next
+ * instruction (used for MIPS).
+ */
+ bool squashAfterDelaySlot[Impl::MaxThreads];
+
+
/** Stat for total number of idle cycles. */
Stats::Scalar<> decodeIdleCycles;
/** Stat for total number of blocked cycles. */