diff options
Diffstat (limited to 'src/cpu/o3/dyn_inst.hh')
| -rw-r--r-- | src/cpu/o3/dyn_inst.hh | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index d3c67c4cb..22b4bb12a 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -53,6 +53,7 @@ #include "cpu/base_dyn_inst.hh" #include "cpu/inst_seq.hh" #include "cpu/reg_class.hh" +#include "debug/IFT.hh" class Packet; @@ -416,8 +417,12 @@ class BaseO3DynInst : public BaseDynInst<Impl> BaseDynInst<Impl>::setCCRegOperand(si, idx, val); } - void taintDestRegs(bool istaint) + void taintDestRegs(bool istaint, const char *reason) { + DPRINTF(IFT, "%s dst registers of instruction PC: %s [sn:%i] because %s\n", + istaint?"Tainting":"Untainting", + this->pcState(), this->seqNum, + reason); isTainted = istaint; for (size_t i = 0; i < this->numDestRegs(); i++) { auto dstreg = _destRegIdx[i]; @@ -431,11 +436,16 @@ class BaseO3DynInst : public BaseDynInst<Impl> bool srcTainted(void) { + DPRINTF(IFT, "checking instruction PC: %s [sn:%i] for tainted registers.\n", + this->pcState(), this->seqNum); bool result = false; for (size_t i = 0; i < this->numSrcRegs(); i++) { auto src = _srcRegIdx[i]; result |= cpu->regTainted(src); } + DPRINTF(IFT, "source registers of instruction PC: %s [sn:%i] is %s\n", + this->pcState(), this->seqNum, + result?"tainted":"not tainted"); return result; } |