1 files changed, 24 insertions, 0 deletions
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 47dc830e0..d3c67c4cb 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -81,6 +81,7 @@ class BaseO3DynInst : public BaseDynInst<Impl>
         MaxInstSrcRegs = TheISA::MaxInstSrcRegs,        //< Max source regs
         MaxInstDestRegs = TheISA::MaxInstDestRegs       //< Max dest regs
     };
+    bool isTainted;
 
   public:
     /** BaseDynInst constructor given a binary instruction. */
@@ -415,6 +416,29 @@ class BaseO3DynInst : public BaseDynInst<Impl>
         BaseDynInst<Impl>::setCCRegOperand(si, idx, val);
     }
 
+    void taintDestRegs(bool istaint)
+    {
+        isTainted = istaint;
+        for (size_t i = 0; i < this->numDestRegs(); i++) {
+            auto dstreg = _destRegIdx[i];
+            if (istaint) {
+                cpu->setTaint(dstreg);
+            } else {
+                cpu->clearTaint(dstreg);
+            }
+        }
+    }
+
+    bool srcTainted(void)
+    {
+        bool result = false;
+        for (size_t i = 0; i < this->numSrcRegs(); i++) {
+            auto src = _srcRegIdx[i];
+            result |= cpu->regTainted(src);
+        }
+        return result;
+    }
+
 #if THE_ISA == MIPS_ISA
     MiscReg readRegOtherThread(const RegId& misc_reg, ThreadID tid)
     {