diff options
Diffstat (limited to 'src/cpu/o3/dyn_inst.hh')
| -rw-r--r-- | src/cpu/o3/dyn_inst.hh | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index 9793f4ead..e6dffc81d 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -222,7 +222,7 @@ class BaseO3DynInst : public BaseDynInst<Impl> break; case FloatRegClass: this->setFloatRegOperandBits(this->staticInst.get(), idx, - this->cpu->readFloatRegBits(prev_phys_reg)); + this->cpu->readFloatReg(prev_phys_reg)); break; case VecRegClass: this->setVecRegOperand(this->staticInst.get(), idx, @@ -280,7 +280,7 @@ class BaseO3DynInst : public BaseDynInst<Impl> RegVal readFloatRegOperandBits(const StaticInst *si, int idx) { - return this->cpu->readFloatRegBits(this->_srcRegIdx[idx]); + return this->cpu->readFloatReg(this->_srcRegIdx[idx]); } const VecRegContainer& @@ -396,7 +396,7 @@ class BaseO3DynInst : public BaseDynInst<Impl> void setFloatRegOperandBits(const StaticInst *si, int idx, RegVal val) { - this->cpu->setFloatRegBits(this->_destRegIdx[idx], val); + this->cpu->setFloatReg(this->_destRegIdx[idx], val); BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val); } |