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Diffstat (limited to 'src/cpu/o3/dyn_inst.hh')
-rw-r--r--src/cpu/o3/dyn_inst.hh6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index e6dffc81d..fc9abb92e 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -66,7 +66,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
/** Binary machine instruction type. */
typedef TheISA::MachInst MachInst;
/** Register types. */
- typedef TheISA::CCReg CCReg;
using VecRegContainer = TheISA::VecRegContainer;
using VecElem = TheISA::VecElem;
static constexpr auto NumVecElemPerVecReg = TheISA::NumVecElemPerVecReg;
@@ -378,7 +377,8 @@ class BaseO3DynInst : public BaseDynInst<Impl>
return this->cpu->getWritableVecPredReg(this->_destRegIdx[idx]);
}
- CCReg readCCRegOperand(const StaticInst *si, int idx)
+ RegVal
+ readCCRegOperand(const StaticInst *si, int idx)
{
return this->cpu->readCCReg(this->_srcRegIdx[idx]);
}
@@ -424,7 +424,7 @@ class BaseO3DynInst : public BaseDynInst<Impl>
BaseDynInst<Impl>::setVecPredRegOperand(si, idx, val);
}
- void setCCRegOperand(const StaticInst *si, int idx, CCReg val)
+ void setCCRegOperand(const StaticInst *si, int idx, RegVal val)
{
this->cpu->setCCReg(this->_destRegIdx[idx], val);
BaseDynInst<Impl>::setCCRegOperand(si, idx, val);