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-rw-r--r--src/cpu/o3/fetch.hh6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh
index 4382197f4..da7ba4bb3 100644
--- a/src/cpu/o3/fetch.hh
+++ b/src/cpu/o3/fetch.hh
@@ -99,7 +99,7 @@ class DefaultFetch
{}
void
- finish(const Fault &fault, RequestPtr req, ThreadContext *tc,
+ finish(const Fault &fault, const RequestPtr &req, ThreadContext *tc,
BaseTLB::Mode mode)
{
assert(mode == BaseTLB::Execute);
@@ -129,7 +129,7 @@ class DefaultFetch
fault = _fault;
}
- void setReq(RequestPtr _req)
+ void setReq(const RequestPtr &_req)
{
req = _req;
}
@@ -295,7 +295,7 @@ class DefaultFetch
* @return Any fault that occured.
*/
bool fetchCacheLine(Addr vaddr, ThreadID tid, Addr pc);
- void finishTranslation(const Fault &fault, RequestPtr mem_req);
+ void finishTranslation(const Fault &fault, const RequestPtr &mem_req);
/** Check if an interrupt is pending and that we need to handle