summaryrefslogtreecommitdiff
path: root/src/cpu/o3/fetch_impl.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/o3/fetch_impl.hh')
-rw-r--r--src/cpu/o3/fetch_impl.hh3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 79a4f2b7a..f9cc78c18 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -601,7 +601,8 @@ DefaultFetch<Impl>::fetchCacheLine(Addr fetch_PC, Fault &ret_fault, unsigned tid
memReq[tid] = mem_req;
// Translate the instruction request.
- fault = cpu->itb->translateAtomic(mem_req, cpu->thread[tid]->getTC());
+ fault = cpu->itb->translateAtomic(mem_req, cpu->thread[tid]->getTC(),
+ false, true);
// In the case of faults, the fetch stage may need to stall and wait
// for the ITB miss to be handled.