diff options
Diffstat (limited to 'src/cpu/o3/fetch_impl.hh')
| -rw-r--r-- | src/cpu/o3/fetch_impl.hh | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index 3ae7bc402..0fd1e7bac 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -29,6 +29,9 @@ * Korey Sewell */ +#include <algorithm> +#include <cstring> + #include "config/use_checker.hh" #include "arch/isa_traits.hh" @@ -48,8 +51,6 @@ #include "sim/system.hh" #endif // FULL_SYSTEM -#include <algorithm> - template<class Impl> void DefaultFetch<Impl>::IcachePort::setPeer(Port *port) @@ -374,7 +375,7 @@ DefaultFetch<Impl>::processCacheCompletion(PacketPtr pkt) return; } - memcpy(cacheData[tid], pkt->getPtr<uint8_t *>(), cacheBlkSize); + memcpy(cacheData[tid], pkt->getPtr<uint8_t>(), cacheBlkSize); cacheDataValid[tid] = true; if (!drainPending) { @@ -1116,7 +1117,7 @@ DefaultFetch<Impl>::fetch(bool &status_change) (&cacheData[tid][offset])); predecoder.setTC(cpu->thread[tid]->getTC()); - predecoder.moreBytes(fetch_PC, 0, inst); + predecoder.moreBytes(fetch_PC, fetch_PC, 0, inst); ext_inst = predecoder.getExtMachInst(); staticInst = StaticInstPtr(ext_inst); @@ -1153,10 +1154,14 @@ DefaultFetch<Impl>::fetch(bool &status_change) DPRINTF(Fetch, "[tid:%i]: Instruction is: %s\n", tid, instruction->staticInst->disassemble(fetch_PC)); +#if TRACING_ON instruction->traceData = Trace::getInstRecord(curTick, cpu->tcBase(tid), instruction->staticInst, instruction->readPC()); +#else + instruction->traceData = NULL; +#endif ///FIXME This needs to be more robust in dealing with delay slots predicted_branch |= |