summaryrefslogtreecommitdiff
path: root/src/cpu/o3/inst_queue_impl.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/o3/inst_queue_impl.hh')
-rw-r--r--src/cpu/o3/inst_queue_impl.hh6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index 516d526b1..7352c622b 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -801,21 +801,21 @@ InstructionQueue<Impl>::scheduleReadyInsts()
continue;
}
- int idx = -2;
+ int idx = FUPool::NoCapableFU;
Cycles op_latency = Cycles(1);
ThreadID tid = issuing_inst->threadNumber;
if (op_class != No_OpClass) {
idx = fuPool->getUnit(op_class);
issuing_inst->isFloating() ? fpAluAccesses++ : intAluAccesses++;
- if (idx > -1) {
+ if (idx > FUPool::NoFreeFU) {
op_latency = fuPool->getOpLatency(op_class);
}
}
// If we have an instruction that doesn't require a FU, or a
// valid FU, then schedule for execution.
- if (idx == -2 || idx != -1) {
+ if (idx != FUPool::NoFreeFU) {
if (op_latency == Cycles(1)) {
i2e_info->size++;
instsToExecute.push_back(issuing_inst);