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-rw-r--r--src/cpu/o3/lsq_impl.hh7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index b4a6a02da..10c0afd38 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -84,9 +84,10 @@ LSQ<Impl>::DcachePort::recvTiming(PacketPtr pkt)
lsq->thread[pkt->req->getThreadNum()].completeDataAccess(pkt);
}
else {
- //else it is a coherence request, maybe you need to do something
- warn("Recieved a coherence request (Invalidate?), 03CPU doesn't"
- "update LSQ for these\n");
+ // must be a snoop
+
+ // @TODO someday may need to process invalidations in LSQ here
+ // to provide stronger consistency model
}
return true;
}