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Diffstat (limited to 'src/cpu/o3/lsq_unit.hh')
-rw-r--r--src/cpu/o3/lsq_unit.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index 9f0f38f06..28e6f4506 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -514,7 +514,7 @@ LSQUnit<Impl>::read(Request *req, T &data, int load_idx)
"storeHead: %i addr: %#x\n",
load_idx, store_idx, storeHead, req->getPaddr());
- if (req->isLlsc()) {
+ if (req->isLLSC()) {
// Disable recording the result temporarily. Writing to misc
// regs normally updates the result, but this is not the
// desired behavior when handling store conditionals.
@@ -647,7 +647,7 @@ LSQUnit<Impl>::read(Request *req, T &data, int load_idx)
if (!lsq->cacheBlocked()) {
PacketPtr data_pkt =
new Packet(req,
- (req->isLlsc() ?
+ (req->isLLSC() ?
MemCmd::LoadLockedReq : MemCmd::ReadReq),
Packet::Broadcast);
data_pkt->dataStatic(load_inst->memData);