diff options
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
| -rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index e6bb560af..b805ed4be 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -109,9 +109,7 @@ LSQUnit<Impl>::completeDataAccess(PacketPtr pkt) } assert(!cpu->switchedOut()); - if (inst->isSquashed()) { - iewStage->decrWb(inst->seqNum); - } else { + if (!inst->isSquashed()) { if (!state->noWB) { if (!TheISA::HasUnalignedMemAcc || !state->isSplit || !state->isLoad) { @@ -1130,7 +1128,6 @@ LSQUnit<Impl>::writeback(DynInstPtr &inst, PacketPtr pkt) // Squashed instructions do not need to complete their access. if (inst->isSquashed()) { - iewStage->decrWb(inst->seqNum); assert(!inst->isStore()); ++lsqIgnoredResponses; return; |