diff options
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
| -rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 13 |
1 files changed, 2 insertions, 11 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index f0b27ba41..077af1dd7 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -1,3 +1,4 @@ + /* * Copyright (c) 2010-2012 ARM Limited * All rights reserved @@ -190,7 +191,7 @@ LSQUnit<Impl>::resetState() isLoadBlocked = false; loadBlockedHandled = false; - cacheBlockMask = 0; + cacheBlockMask = ~(cpu->cacheLineSize() - 1); } template<class Impl> @@ -419,16 +420,6 @@ LSQUnit<Impl>::checkSnoop(PacketPtr pkt) { int load_idx = loadHead; - if (!cacheBlockMask) { - assert(dcachePort); - Addr bs = dcachePort->peerBlockSize(); - - // Make sure we actually got a size - assert(bs != 0); - - cacheBlockMask = ~(bs - 1); - } - // Unlock the cpu-local monitor when the CPU sees a snoop to a locked // address. The CPU can speculatively execute a LL operation after a pending // SC operation in the pipeline and that can make the cache monitor the CPU |