diff options
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
-rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index c2750be7d..d8f1c39c6 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -61,8 +61,8 @@ #include "mem/request.hh" template<class Impl> -LSQUnit<Impl>::WritebackEvent::WritebackEvent(DynInstPtr &_inst, PacketPtr _pkt, - LSQUnit *lsq_ptr) +LSQUnit<Impl>::WritebackEvent::WritebackEvent(const DynInstPtr &_inst, + PacketPtr _pkt, LSQUnit *lsq_ptr) : Event(Default_Pri, AutoDelete), inst(_inst), pkt(_pkt), lsqPtr(lsq_ptr) { @@ -339,7 +339,7 @@ LSQUnit<Impl>::resizeSQ(unsigned size) template <class Impl> void -LSQUnit<Impl>::insert(DynInstPtr &inst) +LSQUnit<Impl>::insert(const DynInstPtr &inst) { assert(inst->isMemRef()); @@ -356,7 +356,7 @@ LSQUnit<Impl>::insert(DynInstPtr &inst) template <class Impl> void -LSQUnit<Impl>::insertLoad(DynInstPtr &load_inst) +LSQUnit<Impl>::insertLoad(const DynInstPtr &load_inst) { assert((loadTail + 1) % LQEntries != loadHead); assert(loads < LQEntries); @@ -381,7 +381,7 @@ LSQUnit<Impl>::insertLoad(DynInstPtr &load_inst) template <class Impl> void -LSQUnit<Impl>::insertStore(DynInstPtr &store_inst) +LSQUnit<Impl>::insertStore(const DynInstPtr &store_inst) { // Make sure it is not full before inserting an instruction. assert((storeTail + 1) % SQEntries != storeHead); @@ -525,7 +525,7 @@ LSQUnit<Impl>::checkSnoop(PacketPtr pkt) template <class Impl> Fault -LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst) +LSQUnit<Impl>::checkViolations(int load_idx, const DynInstPtr &inst) { Addr inst_eff_addr1 = inst->effAddr >> depCheckShift; Addr inst_eff_addr2 = (inst->effAddr + inst->effSize - 1) >> depCheckShift; @@ -605,7 +605,7 @@ LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst) template <class Impl> Fault -LSQUnit<Impl>::executeLoad(DynInstPtr &inst) +LSQUnit<Impl>::executeLoad(const DynInstPtr &inst) { using namespace TheISA; // Execute a specific load. @@ -654,7 +654,7 @@ LSQUnit<Impl>::executeLoad(DynInstPtr &inst) template <class Impl> Fault -LSQUnit<Impl>::executeStore(DynInstPtr &store_inst) +LSQUnit<Impl>::executeStore(const DynInstPtr &store_inst) { using namespace TheISA; // Make sure that a store exists. @@ -1105,7 +1105,7 @@ LSQUnit<Impl>::storePostSend(PacketPtr pkt) template <class Impl> void -LSQUnit<Impl>::writeback(DynInstPtr &inst, PacketPtr pkt) +LSQUnit<Impl>::writeback(const DynInstPtr &inst, PacketPtr pkt) { iewStage->wakeCPU(); |