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Diffstat (limited to 'src/cpu/o3/mips/cpu.hh')
-rwxr-xr-xsrc/cpu/o3/mips/cpu.hh7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/cpu/o3/mips/cpu.hh b/src/cpu/o3/mips/cpu.hh
index bf04b9f69..7e6268cdf 100755
--- a/src/cpu/o3/mips/cpu.hh
+++ b/src/cpu/o3/mips/cpu.hh
@@ -92,16 +92,15 @@ class MipsO3CPU : public FullO3CPU<Impl>
/** Reads a misc. register, including any side effects the read
* might have as defined by the architecture.
*/
- TheISA::MiscReg readMiscRegWithEffect(int misc_reg,
- Fault &fault, unsigned tid);
+ TheISA::MiscReg readMiscRegWithEffect(int misc_reg, unsigned tid);
/** Sets a miscellaneous register. */
- Fault setMiscReg(int misc_reg, const TheISA::MiscReg &val, unsigned tid);
+ void setMiscReg(int misc_reg, const TheISA::MiscReg &val, unsigned tid);
/** Sets a misc. register, including any side effects the write
* might have as defined by the architecture.
*/
- Fault setMiscRegWithEffect(int misc_reg,
+ void setMiscRegWithEffect(int misc_reg,
const TheISA::MiscReg &val, unsigned tid);
/** Initiates a squash of all in-flight instructions for a given