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Diffstat (limited to 'src/cpu/o3/mips/cpu_impl.hh')
-rw-r--r--src/cpu/o3/mips/cpu_impl.hh11
1 files changed, 5 insertions, 6 deletions
diff --git a/src/cpu/o3/mips/cpu_impl.hh b/src/cpu/o3/mips/cpu_impl.hh
index 72b64943b..e08741626 100644
--- a/src/cpu/o3/mips/cpu_impl.hh
+++ b/src/cpu/o3/mips/cpu_impl.hh
@@ -45,8 +45,6 @@
#include "cpu/o3/comm.hh"
#include "cpu/o3/thread_state.hh"
-using namespace TheISA;
-
template <class Impl>
MipsO3CPU<Impl>::MipsO3CPU(Params *params)
: FullO3CPU<Impl>(params)
@@ -240,12 +238,13 @@ MipsO3CPU<Impl>::setSyscallReturn(SyscallReturn return_value, int tid)
// check for error condition.
if (return_value.successful()) {
// no error
- this->setArchIntReg(SyscallSuccessReg, 0, tid);
- this->setArchIntReg(ReturnValueReg, return_value.value(), tid);
+ this->setArchIntReg(TheISA::SyscallSuccessReg, 0, tid);
+ this->setArchIntReg(TheISA::ReturnValueReg, return_value.value(), tid);
} else {
// got an error, return details
- this->setArchIntReg(SyscallSuccessReg, (IntReg) -1, tid);
- this->setArchIntReg(ReturnValueReg, -return_value.value(), tid);
+ this->setArchIntReg(TheISA::SyscallSuccessReg,
+ (TheISA::IntReg) -1, tid);
+ this->setArchIntReg(TheISA::ReturnValueReg, -return_value.value(), tid);
}
}
#endif