diff options
Diffstat (limited to 'src/cpu/o3/regfile.hh')
| -rw-r--r-- | src/cpu/o3/regfile.hh | 161 |
1 files changed, 157 insertions, 4 deletions
diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh index c353b2746..7feec933f 100644 --- a/src/cpu/o3/regfile.hh +++ b/src/cpu/o3/regfile.hh @@ -1,4 +1,16 @@ /* + * Copyright (c) 2016 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2004-2005 The Regents of The University of Michigan * Copyright (c) 2013 Advanced Micro Devices, Inc. * All rights reserved. @@ -42,6 +54,7 @@ #include "config/the_isa.hh" #include "cpu/o3/comm.hh" #include "debug/IEW.hh" +#include "enums/VecRegRenameMode.hh" class UnifiedFreeList; @@ -56,6 +69,15 @@ class PhysRegFile typedef TheISA::FloatReg FloatReg; typedef TheISA::FloatRegBits FloatRegBits; typedef TheISA::CCReg CCReg; + using VecElem = TheISA::VecElem; + using VecRegContainer = TheISA::VecRegContainer; + using PhysIds = std::vector<PhysRegId>; + using VecMode = Enums::VecRegRenameMode; + public: + using IdRange = std::pair<PhysIds::const_iterator, + PhysIds::const_iterator>; + private: + static constexpr auto NumVecElemPerVecReg = TheISA::NumVecElemPerVecReg; typedef union { FloatReg d; @@ -70,6 +92,11 @@ class PhysRegFile std::vector<PhysFloatReg> floatRegFile; std::vector<PhysRegId> floatRegIds; + /** Vector register file. */ + std::vector<VecRegContainer> vectorRegFile; + std::vector<PhysRegId> vecRegIds; + std::vector<PhysRegId> vecElemIds; + /** Condition-code register file. */ std::vector<CCReg> ccRegFile; std::vector<PhysRegId> ccRegIds; @@ -83,18 +110,31 @@ class PhysRegFile unsigned numPhysicalIntRegs; /** - * Number of physical general purpose registers + * Number of physical floating point registers */ unsigned numPhysicalFloatRegs; /** - * Number of physical general purpose registers + * Number of physical vector registers + */ + unsigned numPhysicalVecRegs; + + /** + * Number of physical vector element registers + */ + unsigned numPhysicalVecElemRegs; + + /** + * Number of physical CC registers */ unsigned numPhysicalCCRegs; /** Total number of physical registers. */ unsigned totalNumRegs; + /** Mode in which vector registers are addressed. */ + VecMode vecMode; + public: /** * Constructs a physical register file with the specified amount of @@ -102,7 +142,10 @@ class PhysRegFile */ PhysRegFile(unsigned _numPhysicalIntRegs, unsigned _numPhysicalFloatRegs, - unsigned _numPhysicalCCRegs); + unsigned _numPhysicalVecRegs, + unsigned _numPhysicalCCRegs, + VecMode vmode + ); /** * Destructor to free resources @@ -117,6 +160,11 @@ class PhysRegFile /** @return the number of floating-point physical registers. */ unsigned numFloatPhysRegs() const { return numPhysicalFloatRegs; } + /** @return the number of vector physical registers. */ + unsigned numVecPhysRegs() const { return numPhysicalVecRegs; } + + /** @return the number of vector physical registers. */ + unsigned numVecElemPhysRegs() const { return numPhysicalVecElemRegs; } /** @return the number of condition-code physical registers. */ unsigned numCCPhysRegs() const { return numPhysicalCCRegs; } @@ -164,6 +212,68 @@ class PhysRegFile return floatRegBits; } + /** Reads a vector register. */ + const VecRegContainer& readVecReg(PhysRegIdPtr phys_reg) const + { + assert(phys_reg->isVectorPhysReg()); + + DPRINTF(IEW, "RegFile: Access to vector register %i, has " + "data %s\n", int(phys_reg->index()), + vectorRegFile[phys_reg->index()].as<VecElem>().print()); + + return vectorRegFile[phys_reg->index()]; + } + + /** Reads a vector register for modification. */ + VecRegContainer& getWritableVecReg(PhysRegIdPtr phys_reg) + { + /* const_cast for not duplicating code above. */ + return const_cast<VecRegContainer&>(readVecReg(phys_reg)); + } + + /** Reads a vector register lane. */ + template <typename VecElem, int LaneIdx> + VecLaneT<VecElem, true> + readVecLane(PhysRegIdPtr phys_reg) const + { + return readVecReg(phys_reg).laneView<VecElem, LaneIdx>(); + } + + /** Reads a vector register lane. */ + template <typename VecElem> + VecLaneT<VecElem, true> + readVecLane(PhysRegIdPtr phys_reg) const + { + return readVecReg(phys_reg).laneView<VecElem>(phys_reg->elemIndex()); + } + + /** Get a vector register lane for modification. */ + template <typename LD> + void + setVecLane(PhysRegIdPtr phys_reg, const LD& val) + { + assert(phys_reg->isVectorPhysReg()); + + DPRINTF(IEW, "RegFile: Setting vector register %i[%d] to %lx\n", + int(phys_reg->index()), phys_reg->elemIndex(), val); + + vectorRegFile[phys_reg->index()].laneView<typename LD::UnderlyingType>( + phys_reg->elemIndex()) = val; + } + + /** Reads a vector element. */ + const VecElem& readVecElem(PhysRegIdPtr phys_reg) const + { + assert(phys_reg->isVectorPhysElem()); + auto ret = vectorRegFile[phys_reg->index()].as<VecElem>(); + const VecElem& val = ret[phys_reg->elemIndex()]; + DPRINTF(IEW, "RegFile: Access to element %d of vector register %i," + " has data %#x\n", phys_reg->elemIndex(), + int(phys_reg->index()), val); + + return val; + } + /** Reads a condition-code register. */ CCReg readCCReg(PhysRegIdPtr phys_reg) { @@ -207,7 +317,31 @@ class PhysRegFile DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", phys_reg->index(), (uint64_t)val); - floatRegFile[phys_reg->index()].q = val; + if (!phys_reg->isZeroReg()) + floatRegFile[phys_reg->index()].q = val; + } + + /** Sets a vector register to the given value. */ + void setVecReg(PhysRegIdPtr phys_reg, const VecRegContainer& val) + { + assert(phys_reg->isVectorPhysReg()); + + DPRINTF(IEW, "RegFile: Setting vector register %i to %s\n", + int(phys_reg->index()), val.print()); + + vectorRegFile[phys_reg->index()] = val; + } + + /** Sets a vector register to the given value. */ + void setVecElem(PhysRegIdPtr phys_reg, const VecElem val) + { + assert(phys_reg->isVectorPhysElem()); + + DPRINTF(IEW, "RegFile: Setting element %d of vector register %i to" + " %#x\n", phys_reg->elemIndex(), int(phys_reg->index()), val); + + vectorRegFile[phys_reg->index()].as<VecElem>()[phys_reg->elemIndex()] = + val; } /** Sets a condition-code register to the given value. */ @@ -220,6 +354,25 @@ class PhysRegFile ccRegFile[phys_reg->index()] = val; } + + /** Get the PhysRegIds of the elems of a vector register. + * Auxiliary function to transition from Full vector mode to Elem mode. + */ + IdRange getRegElemIds(PhysRegIdPtr reg); + + /** + * Get the PhysRegIds of the elems of all vector registers. + * Auxiliary function to transition from Full vector mode to Elem mode + * and to initialise the rename map. + */ + IdRange getRegIds(RegClass cls); + + /** + * Get the true physical register id. + * As many parts work with PhysRegIdPtr, we need to be able to produce + * the pointer out of just class and register idx. + */ + PhysRegIdPtr getTrueId(PhysRegIdPtr reg); }; |