1 files changed, 16 insertions, 4 deletions

diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh
index b835a7dd8..68be3612f 100644
--- a/src/cpu/o3/regfile.hh
+++ b/src/cpu/o3/regfile.hh
@@ -55,6 +55,7 @@
 #include "cpu/o3/comm.hh"
 #include "debug/IEW.hh"
 #include "enums/VecRegRenameMode.hh"
+#include "debug/IFT.hh"
 
 class UnifiedFreeList;
 
@@ -202,23 +203,34 @@ class PhysRegFile
         warn_once("taint for vector registers not supported yet\n");
         break;
       }
+      DPRINTF(IFT, "register %s %d is set to %d\n",
+              phys_reg->className(), idx, taintvalue);
+
     }
 
     bool regTainted(PhysRegIdPtr phys_reg) {
       RegIndex idx = phys_reg->index();
+      bool result;
       switch (phys_reg->classValue()) {
       case IntRegClass:
-        return intTaintMap[idx];
+        result = intTaintMap[idx];
+        break;
       case FloatRegClass:
-        return floatTaintMap[idx];
+        result = floatTaintMap[idx];
+        break;
       case CCRegClass:
-        return ccTaintMap[idx];
+        result = ccTaintMap[idx];
+        break;
       case MiscRegClass:
-        return miscTaintMap[idx];
+        result = miscTaintMap[idx];
+        break;
       default:
         warn_once("taint for vector registers not supported yet\n");
         return false;
       }
+      DPRINTF(IFT, "register %s %d is %s\n",
+              phys_reg->className(), idx, result?"tained":"not tainted");
+      return result;
     }
 
     /** Reads an integer register. */