summaryrefslogtreecommitdiff
path: root/src/cpu/o3/rename_map.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/o3/rename_map.hh')
-rw-r--r--src/cpu/o3/rename_map.hh87
1 files changed, 33 insertions, 54 deletions
diff --git a/src/cpu/o3/rename_map.hh b/src/cpu/o3/rename_map.hh
index 2cce29913..f51cf5922 100644
--- a/src/cpu/o3/rename_map.hh
+++ b/src/cpu/o3/rename_map.hh
@@ -42,10 +42,6 @@
* Steve Reinhardt
*/
-// Todo: Create destructor.
-// Have it so that there's a more meaningful name given to the variable
-// that marks the beginning of the FP registers.
-
#ifndef __CPU_O3_RENAME_MAP_HH__
#define __CPU_O3_RENAME_MAP_HH__
@@ -71,7 +67,7 @@ class SimpleRenameMap
private:
/** The acutal arch-to-phys register map */
- std::vector<PhysRegIndex> map;
+ std::vector<PhysRegIdPtr> map;
/**
* Pointer to the free list from which new physical registers
@@ -107,7 +103,7 @@ class SimpleRenameMap
* renamed to, and the previous physical register that the same
* logical register was previously mapped to.
*/
- typedef std::pair<PhysRegIndex, PhysRegIndex> RenameInfo;
+ typedef std::pair<PhysRegIdPtr, PhysRegIdPtr> RenameInfo;
/**
* Tell rename map to get a new free physical register to remap
@@ -123,7 +119,7 @@ class SimpleRenameMap
* @param arch_reg The architectural register to look up.
* @return The physical register it is currently mapped to.
*/
- PhysRegIndex lookup(RegIndex arch_reg) const
+ PhysRegIdPtr lookup(RegIndex arch_reg) const
{
assert(arch_reg < map.size());
return map[arch_reg];
@@ -135,7 +131,7 @@ class SimpleRenameMap
* @param arch_reg The architectural register to remap.
* @param phys_reg The physical register to remap it to.
*/
- void setEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
+ void setEntry(RegIndex arch_reg, PhysRegIdPtr phys_reg)
{
map[arch_reg] = phys_reg;
}
@@ -162,18 +158,15 @@ class UnifiedRenameMap
/** The floating-point register rename map */
SimpleRenameMap floatMap;
+ /** The condition-code register rename map */
+ SimpleRenameMap ccMap;
+
/**
- * The register file object is used only to distinguish integer
- * from floating-point physical register indices, which in turn is
- * used only for assert statements that make sure the physical
- * register indices that get passed in and handed out are of the
- * proper class.
+ * The register file object is used only to get PhysRegIdPtr
+ * on MiscRegs, as they are stored in it.
*/
PhysRegFile *regFile;
- /** The condition-code register rename map */
- SimpleRenameMap ccMap;
-
public:
typedef SimpleRenameMap::RenameInfo RenameInfo;
@@ -207,9 +200,7 @@ class UnifiedRenameMap
*/
RenameInfo renameInt(RegIndex rel_arch_reg)
{
- RenameInfo info = intMap.rename(rel_arch_reg);
- assert(regFile->isIntPhysReg(info.first));
- return info;
+ return intMap.rename(rel_arch_reg);
}
/**
@@ -218,9 +209,7 @@ class UnifiedRenameMap
*/
RenameInfo renameFloat(RegIndex rel_arch_reg)
{
- RenameInfo info = floatMap.rename(rel_arch_reg);
- assert(regFile->isFloatPhysReg(info.first));
- return info;
+ return floatMap.rename(rel_arch_reg);
}
/**
@@ -229,9 +218,7 @@ class UnifiedRenameMap
*/
RenameInfo renameCC(RegIndex rel_arch_reg)
{
- RenameInfo info = ccMap.rename(rel_arch_reg);
- assert(regFile->isCCPhysReg(info.first));
- return info;
+ return ccMap.rename(rel_arch_reg);
}
/**
@@ -241,10 +228,9 @@ class UnifiedRenameMap
RenameInfo renameMisc(RegIndex rel_arch_reg)
{
// misc regs aren't really renamed, just remapped
- PhysRegIndex phys_reg = lookupMisc(rel_arch_reg);
- // Set the previous register to the same register; mainly it must be
- // known that the prev reg was outside the range of normal registers
- // so the free list can avoid adding it.
+ PhysRegIdPtr phys_reg = lookupMisc(rel_arch_reg);
+ // Set the new register to the previous one to keep the same
+ // mapping throughout the execution.
return RenameInfo(phys_reg, phys_reg);
}
@@ -256,51 +242,44 @@ class UnifiedRenameMap
* @param arch_reg The architectural register to look up.
* @return The physical register it is currently mapped to.
*/
- PhysRegIndex lookup(RegId arch_reg) const;
+ PhysRegIdPtr lookup(RegId arch_reg) const;
/**
* Perform lookup() on an integer register, given a
* integer register index.
*/
- PhysRegIndex lookupInt(RegIndex rel_arch_reg) const
+ PhysRegIdPtr lookupInt(RegIndex rel_arch_reg) const
{
- PhysRegIndex phys_reg = intMap.lookup(rel_arch_reg);
- assert(regFile->isIntPhysReg(phys_reg));
- return phys_reg;
+ return intMap.lookup(rel_arch_reg);
}
/**
* Perform lookup() on a floating-point register, given a
* floating-point register index.
*/
- PhysRegIndex lookupFloat(RegIndex rel_arch_reg) const
+ PhysRegIdPtr lookupFloat(RegIndex rel_arch_reg) const
{
- PhysRegIndex phys_reg = floatMap.lookup(rel_arch_reg);
- assert(regFile->isFloatPhysReg(phys_reg));
- return phys_reg;
+ return floatMap.lookup(rel_arch_reg);
}
/**
* Perform lookup() on a condition-code register, given a
* condition-code register index.
*/
- PhysRegIndex lookupCC(RegIndex rel_arch_reg) const
+ PhysRegIdPtr lookupCC(RegIndex rel_arch_reg) const
{
- PhysRegIndex phys_reg = ccMap.lookup(rel_arch_reg);
- assert(regFile->isCCPhysReg(phys_reg));
- return phys_reg;
+ return ccMap.lookup(rel_arch_reg);
}
/**
* Perform lookup() on a misc register, given a relative
* misc register index.
*/
- PhysRegIndex lookupMisc(RegIndex rel_arch_reg) const
+ PhysRegIdPtr lookupMisc(RegIndex rel_arch_reg) const
{
- // misc regs aren't really renamed, just given an index
- // beyond the range of actual physical registers
- PhysRegIndex phys_reg = rel_arch_reg + regFile->totalNumPhysRegs();
- return phys_reg;
+ // misc regs aren't really renamed, they keep the same
+ // mapping throughout the execution.
+ return regFile->getMiscRegId(rel_arch_reg);
}
/**
@@ -311,15 +290,15 @@ class UnifiedRenameMap
* @param arch_reg The architectural register to remap.
* @param phys_reg The physical register to remap it to.
*/
- void setEntry(RegId arch_reg, PhysRegIndex phys_reg);
+ void setEntry(RegId arch_reg, PhysRegIdPtr phys_reg);
/**
* Perform setEntry() on an integer register, given a
* integer register index.
*/
- void setIntEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
+ void setIntEntry(RegIndex arch_reg, PhysRegIdPtr phys_reg)
{
- assert(regFile->isIntPhysReg(phys_reg));
+ assert(phys_reg->isIntPhysReg());
intMap.setEntry(arch_reg, phys_reg);
}
@@ -327,9 +306,9 @@ class UnifiedRenameMap
* Perform setEntry() on a floating-point register, given a
* floating-point register index.
*/
- void setFloatEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
+ void setFloatEntry(RegIndex arch_reg, PhysRegIdPtr phys_reg)
{
- assert(regFile->isFloatPhysReg(phys_reg));
+ assert(phys_reg->isFloatPhysReg());
floatMap.setEntry(arch_reg, phys_reg);
}
@@ -337,9 +316,9 @@ class UnifiedRenameMap
* Perform setEntry() on a condition-code register, given a
* condition-code register index.
*/
- void setCCEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
+ void setCCEntry(RegIndex arch_reg, PhysRegIdPtr phys_reg)
{
- assert(regFile->isCCPhysReg(phys_reg));
+ assert(phys_reg->isCCPhysReg());
ccMap.setEntry(arch_reg, phys_reg);
}