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-rw-r--r--src/cpu/o3/sparc/cpu.hh4
-rw-r--r--src/cpu/o3/sparc/cpu_builder.cc132
-rw-r--r--src/cpu/o3/sparc/cpu_impl.hh6
-rw-r--r--src/cpu/o3/sparc/impl.hh4
-rw-r--r--src/cpu/o3/sparc/params.hh61
5 files changed, 12 insertions, 195 deletions
diff --git a/src/cpu/o3/sparc/cpu.hh b/src/cpu/o3/sparc/cpu.hh
index 3fd193e0f..cccfd7d52 100644
--- a/src/cpu/o3/sparc/cpu.hh
+++ b/src/cpu/o3/sparc/cpu.hh
@@ -37,6 +37,7 @@
#include "cpu/o3/cpu.hh"
#include "sim/byteswap.hh"
+class DerivO3CPUParams;
class EndQuiesceEvent;
namespace Kernel {
class Statistics;
@@ -58,10 +59,9 @@ class SparcO3CPU : public FullO3CPU<Impl>
public:
typedef O3ThreadState<Impl> ImplState;
typedef O3ThreadState<Impl> Thread;
- typedef typename Impl::Params Params;
/** Constructs an AlphaO3CPU with the given parameters. */
- SparcO3CPU(Params *params);
+ SparcO3CPU(DerivO3CPUParams *params);
/** Registers statistics. */
void regStats();
diff --git a/src/cpu/o3/sparc/cpu_builder.cc b/src/cpu/o3/sparc/cpu_builder.cc
index b08845b4e..c5ea31210 100644
--- a/src/cpu/o3/sparc/cpu_builder.cc
+++ b/src/cpu/o3/sparc/cpu_builder.cc
@@ -35,14 +35,13 @@
#include "cpu/base.hh"
#include "cpu/o3/sparc/cpu.hh"
#include "cpu/o3/sparc/impl.hh"
-#include "cpu/o3/sparc/params.hh"
#include "cpu/o3/fu_pool.hh"
#include "params/DerivO3CPU.hh"
class DerivO3CPU : public SparcO3CPU<SparcSimpleImpl>
{
public:
- DerivO3CPU(SparcSimpleParams *p)
+ DerivO3CPU(DerivO3CPUParams *p)
: SparcO3CPU<SparcSimpleImpl>(p)
{ }
};
@@ -50,8 +49,6 @@ class DerivO3CPU : public SparcO3CPU<SparcSimpleImpl>
DerivO3CPU *
DerivO3CPUParams::create()
{
- DerivO3CPU *cpu;
-
#if FULL_SYSTEM
// Full-system only supports a single thread for the moment.
int actual_num_threads = 1;
@@ -66,135 +63,18 @@ DerivO3CPUParams::create()
}
#endif
- SparcSimpleParams *params = new SparcSimpleParams;
-
- params->clock = clock;
- params->phase = phase;
-
- params->tracer = tracer;
-
- params->name = name;
- params->numberOfThreads = actual_num_threads;
- params->cpu_id = cpu_id;
- params->activity = activity;
-
- params->itb = itb;
- params->dtb = dtb;
-
- params->system = system;
-#if FULL_SYSTEM
- params->profile = profile;
-
- params->do_quiesce = do_quiesce;
- params->do_checkpoint_insts = do_checkpoint_insts;
- params->do_statistics_insts = do_statistics_insts;
-#else
- params->workload = workload;
-#endif // FULL_SYSTEM
-
-#if USE_CHECKER
- params->checker = checker;
-#endif
-
- params->max_insts_any_thread = max_insts_any_thread;
- params->max_insts_all_threads = max_insts_all_threads;
- params->max_loads_any_thread = max_loads_any_thread;
- params->max_loads_all_threads = max_loads_all_threads;
- params->progress_interval = progress_interval;
-
- //
- // Caches
- //
- params->cachePorts = cachePorts;
-
- params->decodeToFetchDelay = decodeToFetchDelay;
- params->renameToFetchDelay = renameToFetchDelay;
- params->iewToFetchDelay = iewToFetchDelay;
- params->commitToFetchDelay = commitToFetchDelay;
- params->fetchWidth = fetchWidth;
-
- params->renameToDecodeDelay = renameToDecodeDelay;
- params->iewToDecodeDelay = iewToDecodeDelay;
- params->commitToDecodeDelay = commitToDecodeDelay;
- params->fetchToDecodeDelay = fetchToDecodeDelay;
- params->decodeWidth = decodeWidth;
-
- params->iewToRenameDelay = iewToRenameDelay;
- params->commitToRenameDelay = commitToRenameDelay;
- params->decodeToRenameDelay = decodeToRenameDelay;
- params->renameWidth = renameWidth;
-
- params->commitToIEWDelay = commitToIEWDelay;
- params->renameToIEWDelay = renameToIEWDelay;
- params->issueToExecuteDelay = issueToExecuteDelay;
- params->dispatchWidth = dispatchWidth;
- params->issueWidth = issueWidth;
- params->wbWidth = wbWidth;
- params->wbDepth = wbDepth;
- params->fuPool = fuPool;
-
- params->iewToCommitDelay = iewToCommitDelay;
- params->renameToROBDelay = renameToROBDelay;
- params->commitWidth = commitWidth;
- params->squashWidth = squashWidth;
- params->trapLatency = trapLatency;
-
- params->backComSize = backComSize;
- params->forwardComSize = forwardComSize;
-
- params->predType = predType;
- params->localPredictorSize = localPredictorSize;
- params->localCtrBits = localCtrBits;
- params->localHistoryTableSize = localHistoryTableSize;
- params->localHistoryBits = localHistoryBits;
- params->globalPredictorSize = globalPredictorSize;
- params->globalCtrBits = globalCtrBits;
- params->globalHistoryBits = globalHistoryBits;
- params->choicePredictorSize = choicePredictorSize;
- params->choiceCtrBits = choiceCtrBits;
-
- params->BTBEntries = BTBEntries;
- params->BTBTagSize = BTBTagSize;
-
- params->RASSize = RASSize;
-
- params->LQEntries = LQEntries;
- params->SQEntries = SQEntries;
-
- params->SSITSize = SSITSize;
- params->LFSTSize = LFSTSize;
-
- params->numPhysIntRegs = numPhysIntRegs;
- params->numPhysFloatRegs = numPhysFloatRegs;
- params->numIQEntries = numIQEntries;
- params->numROBEntries = numROBEntries;
-
- params->smtNumFetchingThreads = smtNumFetchingThreads;
+ numThreads = actual_num_threads;
// Default smtFetchPolicy to "RoundRobin", if necessary.
std::string round_robin_policy = "RoundRobin";
std::string single_thread = "SingleThread";
if (actual_num_threads > 1 && single_thread.compare(smtFetchPolicy) == 0)
- params->smtFetchPolicy = round_robin_policy;
+ smtFetchPolicy = round_robin_policy;
else
- params->smtFetchPolicy = smtFetchPolicy;
-
- params->smtIQPolicy = smtIQPolicy;
- params->smtLSQPolicy = smtLSQPolicy;
- params->smtLSQThreshold = smtLSQThreshold;
- params->smtROBPolicy = smtROBPolicy;
- params->smtROBThreshold = smtROBThreshold;
- params->smtCommitPolicy = smtCommitPolicy;
-
- params->instShiftAmt = 2;
-
- params->deferRegistration = defer_registration;
-
- params->functionTrace = function_trace;
- params->functionTraceStart = function_trace_start;
+ smtFetchPolicy = smtFetchPolicy;
- cpu = new DerivO3CPU(params);
+ instShiftAmt = 2;
- return cpu;
+ return new DerivO3CPU(this);
}
diff --git a/src/cpu/o3/sparc/cpu_impl.hh b/src/cpu/o3/sparc/cpu_impl.hh
index 068057fc0..2dd38845f 100644
--- a/src/cpu/o3/sparc/cpu_impl.hh
+++ b/src/cpu/o3/sparc/cpu_impl.hh
@@ -41,7 +41,6 @@
#include "sim/stats.hh"
#include "cpu/o3/sparc/cpu.hh"
-#include "cpu/o3/sparc/params.hh"
#include "cpu/o3/sparc/thread_context.hh"
#include "cpu/o3/comm.hh"
#include "cpu/o3/thread_state.hh"
@@ -54,8 +53,11 @@
#include "sim/system.hh"
#endif
+#include "params/DerivO3CPU.hh"
+
template <class Impl>
-SparcO3CPU<Impl>::SparcO3CPU(Params *params) : FullO3CPU<Impl>(this, params)
+SparcO3CPU<Impl>::SparcO3CPU(DerivO3CPUParams *params) :
+ FullO3CPU<Impl>(this, params)
{
DPRINTF(O3CPU, "Creating SparcO3CPU object.\n");
diff --git a/src/cpu/o3/sparc/impl.hh b/src/cpu/o3/sparc/impl.hh
index 0a970c2f0..982fe36cc 100644
--- a/src/cpu/o3/sparc/impl.hh
+++ b/src/cpu/o3/sparc/impl.hh
@@ -33,7 +33,6 @@
#include "arch/sparc/isa_traits.hh"
-#include "cpu/o3/sparc/params.hh"
#include "cpu/o3/cpu_policy.hh"
@@ -77,9 +76,6 @@ struct SparcSimpleImpl
*/
typedef O3CPU CPUType;
- /** The Params to be passed to each stage. */
- typedef SparcSimpleParams Params;
-
enum {
MaxWidth = 8,
MaxThreads = 4
diff --git a/src/cpu/o3/sparc/params.hh b/src/cpu/o3/sparc/params.hh
deleted file mode 100644
index 09f523818..000000000
--- a/src/cpu/o3/sparc/params.hh
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2004-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- */
-
-#ifndef __CPU_O3_SPARC_PARAMS_HH__
-#define __CPU_O3_SPARC_PARAMS_HH__
-
-#include "cpu/o3/cpu.hh"
-#include "cpu/o3/params.hh"
-
-//Forward declarations
-namespace SparcISA
-{
- class DTB;
- class ITB;
-}
-class MemObject;
-class Process;
-class System;
-
-/**
- * This file defines the parameters that will be used for the AlphaO3CPU.
- * This must be defined externally so that the Impl can have a params class
- * defined that it can pass to all of the individual stages.
- */
-
-class SparcSimpleParams : public O3Params
-{
- public:
-
- SparcISA::ITB *itb;
- SparcISA::DTB *dtb;
-};
-
-#endif // __CPU_O3_SPARC_PARAMS_HH__
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