summaryrefslogtreecommitdiff
path: root/src/cpu/o3/thread_context.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/o3/thread_context.hh')
-rw-r--r--src/cpu/o3/thread_context.hh10
1 files changed, 6 insertions, 4 deletions
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index 1ab1a0876..5a05c0200 100644
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -271,7 +271,9 @@ class O3ThreadContext : public ThreadContext
return getWritableVecPredRegFlat(flattenRegId(id).index());
}
- virtual CCReg readCCReg(int reg_idx) {
+ virtual RegVal
+ readCCReg(int reg_idx)
+ {
return readCCRegFlat(flattenRegId(RegId(CCRegClass,
reg_idx)).index());
}
@@ -310,7 +312,7 @@ class O3ThreadContext : public ThreadContext
}
virtual void
- setCCReg(int reg_idx, CCReg val)
+ setCCReg(int reg_idx, RegVal val)
{
setCCRegFlat(flattenRegId(RegId(CCRegClass, reg_idx)).index(), val);
}
@@ -424,8 +426,8 @@ class O3ThreadContext : public ThreadContext
virtual void setVecPredRegFlat(int idx,
const VecPredRegContainer& val) override;
- virtual CCReg readCCRegFlat(int idx);
- virtual void setCCRegFlat(int idx, CCReg val);
+ virtual RegVal readCCRegFlat(int idx);
+ virtual void setCCRegFlat(int idx, RegVal val);
};
#endif