diff options
Diffstat (limited to 'src/cpu/o3/thread_context_impl.hh')
| -rwxr-xr-x | src/cpu/o3/thread_context_impl.hh | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh index f818cc3dc..006d325fc 100755 --- a/src/cpu/o3/thread_context_impl.hh +++ b/src/cpu/o3/thread_context_impl.hh @@ -1,5 +1,6 @@ /* * Copyright (c) 2010-2012 ARM Limited + * Copyright (c) 2013 Advanced Micro Devices, Inc. * All rights reserved * * The license below extends only to copyright in the software and shall @@ -206,6 +207,13 @@ O3ThreadContext<Impl>::readFloatRegBitsFlat(int reg_idx) } template <class Impl> +TheISA::CCReg +O3ThreadContext<Impl>::readCCRegFlat(int reg_idx) +{ + return cpu->readArchCCReg(reg_idx, thread->threadId()); +} + +template <class Impl> void O3ThreadContext<Impl>::setIntRegFlat(int reg_idx, uint64_t val) { @@ -234,6 +242,15 @@ O3ThreadContext<Impl>::setFloatRegBitsFlat(int reg_idx, FloatRegBits val) template <class Impl> void +O3ThreadContext<Impl>::setCCRegFlat(int reg_idx, TheISA::CCReg val) +{ + cpu->setArchCCReg(reg_idx, val, thread->threadId()); + + conditionalSquash(); +} + +template <class Impl> +void O3ThreadContext<Impl>::pcState(const TheISA::PCState &val) { cpu->pcState(val, thread->threadId()); @@ -265,6 +282,13 @@ O3ThreadContext<Impl>::flattenFloatIndex(int reg) } template <class Impl> +int +O3ThreadContext<Impl>::flattenCCIndex(int reg) +{ + return cpu->isa[thread->threadId()]->flattenCCIndex(reg); +} + +template <class Impl> void O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const MiscReg &val) { |