1 files changed, 45 insertions, 89 deletions

diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index 865d58635..fc8b66b83 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -36,16 +36,9 @@
 #if FULL_SYSTEM
 template <class Impl>
 VirtualPort *
-O3ThreadContext<Impl>::getVirtPort(ThreadContext *src_tc)
+O3ThreadContext<Impl>::getVirtPort()
 {
-    if (!src_tc)
-        return thread->getVirtPort();
-
-    VirtualPort *vp;
-
-    vp = new VirtualPort("tc-vport", src_tc);
-    thread->connectToMemFunc(vp);
-    return vp;
+    return thread->getVirtPort();
 }
 
 template <class Impl>
@@ -61,16 +54,16 @@ void
 O3ThreadContext<Impl>::takeOverFrom(ThreadContext *old_context)
 {
     // some things should already be set up
-#if FULL_SYSTEM
     assert(getSystemPtr() == old_context->getSystemPtr());
-#else
+#if !FULL_SYSTEM
     assert(getProcessPtr() == old_context->getProcessPtr());
 #endif
 
     // copy over functional state
     setStatus(old_context->status());
     copyArchRegs(old_context);
-    setCpuId(old_context->readCpuId());
+    setContextId(old_context->contextId());
+    setThreadId(old_context->threadId());
 
 #if !FULL_SYSTEM
     thread->funcExeInst = old_context->readFuncExeInst();
@@ -97,24 +90,12 @@ O3ThreadContext<Impl>::takeOverFrom(ThreadContext *old_context)
     thread->trapPending = false;
 }
 
-#if FULL_SYSTEM
-template <class Impl>
-void
-O3ThreadContext<Impl>::delVirtPort(VirtualPort *vp)
-{
-    if (vp != thread->getVirtPort()) {
-        vp->removeConn();
-        delete vp;
-    }
-}
-#endif
-
 template <class Impl>
 void
 O3ThreadContext<Impl>::activate(int delay)
 {
     DPRINTF(O3CPU, "Calling activate on Thread Context %d\n",
-            getThreadNum());
+            threadId());
 
     if (thread->status() == ThreadContext::Active)
         return;
@@ -124,14 +105,14 @@ O3ThreadContext<Impl>::activate(int delay)
 #endif
 
     if (thread->status() == ThreadContext::Unallocated) {
-        cpu->activateWhenReady(thread->readTid());
+        cpu->activateWhenReady(thread->threadId());
         return;
     }
 
     thread->setStatus(ThreadContext::Active);
 
     // status() == Suspended
-    cpu->activateContext(thread->readTid(), delay);
+    cpu->activateContext(thread->threadId(), delay);
 }
 
 template <class Impl>
@@ -139,7 +120,7 @@ void
 O3ThreadContext<Impl>::suspend(int delay)
 {
     DPRINTF(O3CPU, "Calling suspend on Thread Context %d\n",
-            getThreadNum());
+            threadId());
 
     if (thread->status() == ThreadContext::Suspended)
         return;
@@ -151,14 +132,14 @@ O3ThreadContext<Impl>::suspend(int delay)
 /*
 #if FULL_SYSTEM
     // Don't change the status from active if there are pending interrupts
-    if (cpu->check_interrupts()) {
+    if (cpu->checkInterrupts()) {
         assert(status() == ThreadContext::Active);
         return;
     }
 #endif
 */
     thread->setStatus(ThreadContext::Suspended);
-    cpu->suspendContext(thread->readTid());
+    cpu->suspendContext(thread->threadId());
 }
 
 template <class Impl>
@@ -166,13 +147,13 @@ void
 O3ThreadContext<Impl>::deallocate(int delay)
 {
     DPRINTF(O3CPU, "Calling deallocate on Thread Context %d delay %d\n",
-            getThreadNum(), delay);
+            threadId(), delay);
 
     if (thread->status() == ThreadContext::Unallocated)
         return;
 
     thread->setStatus(ThreadContext::Unallocated);
-    cpu->deallocateContext(thread->readTid(), true, delay);
+    cpu->deallocateContext(thread->threadId(), true, delay);
 }
 
 template <class Impl>
@@ -180,13 +161,13 @@ void
 O3ThreadContext<Impl>::halt(int delay)
 {
     DPRINTF(O3CPU, "Calling halt on Thread Context %d\n",
-            getThreadNum());
+            threadId());
 
     if (thread->status() == ThreadContext::Halted)
         return;
 
     thread->setStatus(ThreadContext::Halted);
-    cpu->haltContext(thread->readTid());
+    cpu->haltContext(thread->threadId());
 }
 
 template <class Impl>
@@ -264,7 +245,7 @@ O3ThreadContext<Impl>::copyArchRegs(ThreadContext *tc)
 {
     // This function will mess things up unless the ROB is empty and
     // there are no instructions in the pipeline.
-    unsigned tid = thread->readTid();
+    unsigned tid = thread->threadId();
     PhysRegIndex renamed_reg;
 
     // First loop through the integer registers.
@@ -311,7 +292,7 @@ uint64_t
 O3ThreadContext<Impl>::readIntReg(int reg_idx)
 {
     reg_idx = TheISA::flattenIntIndex(this, reg_idx);
-    return cpu->readArchIntReg(reg_idx, thread->readTid());
+    return cpu->readArchIntReg(reg_idx, thread->threadId());
 }
 
 template <class Impl>
@@ -321,9 +302,9 @@ O3ThreadContext<Impl>::readFloatReg(int reg_idx, int width)
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
     switch(width) {
       case 32:
-        return cpu->readArchFloatRegSingle(reg_idx, thread->readTid());
+        return cpu->readArchFloatRegSingle(reg_idx, thread->threadId());
       case 64:
-        return cpu->readArchFloatRegDouble(reg_idx, thread->readTid());
+        return cpu->readArchFloatRegDouble(reg_idx, thread->threadId());
       default:
         panic("Unsupported width!");
         return 0;
@@ -335,7 +316,7 @@ TheISA::FloatReg
 O3ThreadContext<Impl>::readFloatReg(int reg_idx)
 {
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    return cpu->readArchFloatRegSingle(reg_idx, thread->readTid());
+    return cpu->readArchFloatRegSingle(reg_idx, thread->threadId());
 }
 
 template <class Impl>
@@ -344,7 +325,7 @@ O3ThreadContext<Impl>::readFloatRegBits(int reg_idx, int width)
 {
     DPRINTF(Fault, "Reading floatint register through the TC!\n");
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    return cpu->readArchFloatRegInt(reg_idx, thread->readTid());
+    return cpu->readArchFloatRegInt(reg_idx, thread->threadId());
 }
 
 template <class Impl>
@@ -352,7 +333,7 @@ TheISA::FloatRegBits
 O3ThreadContext<Impl>::readFloatRegBits(int reg_idx)
 {
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    return cpu->readArchFloatRegInt(reg_idx, thread->readTid());
+    return cpu->readArchFloatRegInt(reg_idx, thread->threadId());
 }
 
 template <class Impl>
@@ -360,11 +341,11 @@ void
 O3ThreadContext<Impl>::setIntReg(int reg_idx, uint64_t val)
 {
     reg_idx = TheISA::flattenIntIndex(this, reg_idx);
-    cpu->setArchIntReg(reg_idx, val, thread->readTid());
+    cpu->setArchIntReg(reg_idx, val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -375,16 +356,16 @@ O3ThreadContext<Impl>::setFloatReg(int reg_idx, FloatReg val, int width)
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
     switch(width) {
       case 32:
-        cpu->setArchFloatRegSingle(reg_idx, val, thread->readTid());
+        cpu->setArchFloatRegSingle(reg_idx, val, thread->threadId());
         break;
       case 64:
-        cpu->setArchFloatRegDouble(reg_idx, val, thread->readTid());
+        cpu->setArchFloatRegDouble(reg_idx, val, thread->threadId());
         break;
     }
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -393,10 +374,10 @@ void
 O3ThreadContext<Impl>::setFloatReg(int reg_idx, FloatReg val)
 {
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    cpu->setArchFloatRegSingle(reg_idx, val, thread->readTid());
+    cpu->setArchFloatRegSingle(reg_idx, val, thread->threadId());
 
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -407,11 +388,11 @@ O3ThreadContext<Impl>::setFloatRegBits(int reg_idx, FloatRegBits val,
 {
     DPRINTF(Fault, "Setting floatint register through the TC!\n");
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    cpu->setArchFloatRegInt(reg_idx, val, thread->readTid());
+    cpu->setArchFloatRegInt(reg_idx, val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -420,11 +401,11 @@ void
 O3ThreadContext<Impl>::setFloatRegBits(int reg_idx, FloatRegBits val)
 {
     reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
-    cpu->setArchFloatRegInt(reg_idx, val, thread->readTid());
+    cpu->setArchFloatRegInt(reg_idx, val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -432,11 +413,11 @@ template <class Impl>
 void
 O3ThreadContext<Impl>::setPC(uint64_t val)
 {
-    cpu->setPC(val, thread->readTid());
+    cpu->setPC(val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -444,11 +425,11 @@ template <class Impl>
 void
 O3ThreadContext<Impl>::setNextPC(uint64_t val)
 {
-    cpu->setNextPC(val, thread->readTid());
+    cpu->setNextPC(val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -456,11 +437,11 @@ template <class Impl>
 void
 O3ThreadContext<Impl>::setMicroPC(uint64_t val)
 {
-    cpu->setMicroPC(val, thread->readTid());
+    cpu->setMicroPC(val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -468,11 +449,11 @@ template <class Impl>
 void
 O3ThreadContext<Impl>::setNextMicroPC(uint64_t val)
 {
-    cpu->setNextMicroPC(val, thread->readTid());
+    cpu->setNextMicroPC(val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -480,11 +461,11 @@ template <class Impl>
 void
 O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
 {
-    cpu->setMiscRegNoEffect(misc_reg, val, thread->readTid());
+    cpu->setMiscRegNoEffect(misc_reg, val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
@@ -493,36 +474,11 @@ void
 O3ThreadContext<Impl>::setMiscReg(int misc_reg,
                                                 const MiscReg &val)
 {
-    cpu->setMiscReg(misc_reg, val, thread->readTid());
+    cpu->setMiscReg(misc_reg, val, thread->threadId());
 
     // Squash if we're not already in a state update mode.
     if (!thread->trapPending && !thread->inSyscall) {
-        cpu->squashFromTC(thread->readTid());
+        cpu->squashFromTC(thread->threadId());
     }
 }
 
-#if !FULL_SYSTEM
-
-template <class Impl>
-TheISA::IntReg
-O3ThreadContext<Impl>::getSyscallArg(int i)
-{
-    return cpu->getSyscallArg(i, thread->readTid());
-}
-
-template <class Impl>
-void
-O3ThreadContext<Impl>::setSyscallArg(int i, IntReg val)
-{
-    cpu->setSyscallArg(i, val, thread->readTid());
-}
-
-template <class Impl>
-void
-O3ThreadContext<Impl>::setSyscallReturn(SyscallReturn return_value)
-{
-    cpu->setSyscallReturn(return_value, thread->readTid());
-}
-
-#endif // FULL_SYSTEM
-