summaryrefslogtreecommitdiff
path: root/src/cpu/o3/thread_context_impl.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/o3/thread_context_impl.hh')
-rwxr-xr-xsrc/cpu/o3/thread_context_impl.hh42
1 files changed, 3 insertions, 39 deletions
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index 55584629e..2d329b056 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -136,7 +136,7 @@ O3ThreadContext<Impl>::activate(int delay)
template <class Impl>
void
-O3ThreadContext<Impl>::suspend()
+O3ThreadContext<Impl>::suspend(int delay)
{
DPRINTF(O3CPU, "Calling suspend on Thread Context %d\n",
getThreadNum());
@@ -177,7 +177,7 @@ O3ThreadContext<Impl>::deallocate(int delay)
template <class Impl>
void
-O3ThreadContext<Impl>::halt()
+O3ThreadContext<Impl>::halt(int delay)
{
DPRINTF(O3CPU, "Calling halt on Thread Context %d\n",
getThreadNum());
@@ -289,13 +289,9 @@ O3ThreadContext<Impl>::copyArchRegs(ThreadContext *tc)
// Copy the misc regs.
TheISA::copyMiscRegs(tc, this);
- // Then finally set the PC, the next PC, the nextNPC, the micropc, and the
- // next micropc.
+ // Then finally set the PC and the next PC.
cpu->setPC(tc->readPC(), tid);
cpu->setNextPC(tc->readNextPC(), tid);
- cpu->setNextNPC(tc->readNextNPC(), tid);
- cpu->setMicroPC(tc->readMicroPC(), tid);
- cpu->setNextMicroPC(tc->readNextMicroPC(), tid);
#if !FULL_SYSTEM
this->thread->funcExeInst = tc->readFuncExeInst();
#endif
@@ -318,7 +314,6 @@ template <class Impl>
TheISA::FloatReg
O3ThreadContext<Impl>::readFloatReg(int reg_idx, int width)
{
- reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
switch(width) {
case 32:
return cpu->readArchFloatRegSingle(reg_idx, thread->readTid());
@@ -334,7 +329,6 @@ template <class Impl>
TheISA::FloatReg
O3ThreadContext<Impl>::readFloatReg(int reg_idx)
{
- reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
return cpu->readArchFloatRegSingle(reg_idx, thread->readTid());
}
@@ -343,7 +337,6 @@ TheISA::FloatRegBits
O3ThreadContext<Impl>::readFloatRegBits(int reg_idx, int width)
{
DPRINTF(Fault, "Reading floatint register through the TC!\n");
- reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
return cpu->readArchFloatRegInt(reg_idx, thread->readTid());
}
@@ -351,7 +344,6 @@ template <class Impl>
TheISA::FloatRegBits
O3ThreadContext<Impl>::readFloatRegBits(int reg_idx)
{
- reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
return cpu->readArchFloatRegInt(reg_idx, thread->readTid());
}
@@ -372,7 +364,6 @@ template <class Impl>
void
O3ThreadContext<Impl>::setFloatReg(int reg_idx, FloatReg val, int width)
{
- reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
switch(width) {
case 32:
cpu->setArchFloatRegSingle(reg_idx, val, thread->readTid());
@@ -392,7 +383,6 @@ template <class Impl>
void
O3ThreadContext<Impl>::setFloatReg(int reg_idx, FloatReg val)
{
- reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
cpu->setArchFloatRegSingle(reg_idx, val, thread->readTid());
if (!thread->trapPending && !thread->inSyscall) {
@@ -406,7 +396,6 @@ O3ThreadContext<Impl>::setFloatRegBits(int reg_idx, FloatRegBits val,
int width)
{
DPRINTF(Fault, "Setting floatint register through the TC!\n");
- reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
cpu->setArchFloatRegInt(reg_idx, val, thread->readTid());
// Squash if we're not already in a state update mode.
@@ -419,7 +408,6 @@ template <class Impl>
void
O3ThreadContext<Impl>::setFloatRegBits(int reg_idx, FloatRegBits val)
{
- reg_idx = TheISA::flattenFloatIndex(this, reg_idx);
cpu->setArchFloatRegInt(reg_idx, val, thread->readTid());
// Squash if we're not already in a state update mode.
@@ -454,30 +442,6 @@ O3ThreadContext<Impl>::setNextPC(uint64_t val)
template <class Impl>
void
-O3ThreadContext<Impl>::setMicroPC(uint64_t val)
-{
- cpu->setMicroPC(val, thread->readTid());
-
- // Squash if we're not already in a state update mode.
- if (!thread->trapPending && !thread->inSyscall) {
- cpu->squashFromTC(thread->readTid());
- }
-}
-
-template <class Impl>
-void
-O3ThreadContext<Impl>::setNextMicroPC(uint64_t val)
-{
- cpu->setNextMicroPC(val, thread->readTid());
-
- // Squash if we're not already in a state update mode.
- if (!thread->trapPending && !thread->inSyscall) {
- cpu->squashFromTC(thread->readTid());
- }
-}
-
-template <class Impl>
-void
O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
{
cpu->setMiscRegNoEffect(misc_reg, val, thread->readTid());