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-rw-r--r--src/cpu/o3/commit_impl.hh2
-rw-r--r--src/cpu/o3/cpu.cc20
-rw-r--r--src/cpu/o3/cpu.hh12
-rw-r--r--src/cpu/o3/fetch_impl.hh6
-rw-r--r--src/cpu/o3/inst_queue_impl.hh2
-rw-r--r--src/cpu/o3/lsq_impl.hh2
-rw-r--r--src/cpu/o3/lsq_unit.hh2
-rw-r--r--src/cpu/o3/lsq_unit_impl.hh2
-rwxr-xr-xsrc/cpu/o3/thread_context_impl.hh6
9 files changed, 27 insertions, 27 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index e8681f6e3..2912cbb03 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -475,7 +475,7 @@ DefaultCommit<Impl>::generateTrapEvent(ThreadID tid)
TrapEvent *trap = new TrapEvent(this, tid);
- cpu->schedule(trap, curTick + trapLatency);
+ cpu->schedule(trap, curTick() + trapLatency);
trapInFlight[tid] = true;
}
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 21c5cc706..9becc6601 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -334,7 +334,7 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params)
// Setup the ROB for whichever stages need it.
commit.setROB(&rob);
- lastRunningCycle = curTick;
+ lastRunningCycle = curTick();
lastActivatedCycle = -1;
#if 0
@@ -538,13 +538,13 @@ FullO3CPU<Impl>::tick()
getState() == SimObject::Drained) {
DPRINTF(O3CPU, "Switched out!\n");
// increment stat
- lastRunningCycle = curTick;
+ lastRunningCycle = curTick();
} else if (!activityRec.active() || _status == Idle) {
DPRINTF(O3CPU, "Idle!\n");
- lastRunningCycle = curTick;
+ lastRunningCycle = curTick();
timesIdled++;
} else {
- schedule(tickEvent, nextCycle(curTick + ticks(1)));
+ schedule(tickEvent, nextCycle(curTick() + ticks(1)));
DPRINTF(O3CPU, "Scheduling next tick!\n");
}
}
@@ -639,13 +639,13 @@ FullO3CPU<Impl>::activateContext(ThreadID tid, int delay)
// Needs to set each stage to running as well.
if (delay){
DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate "
- "on cycle %d\n", tid, curTick + ticks(delay));
+ "on cycle %d\n", tid, curTick() + ticks(delay));
scheduleActivateThreadEvent(tid, delay);
} else {
activateThread(tid);
}
- if (lastActivatedCycle < curTick) {
+ if (lastActivatedCycle < curTick()) {
scheduleTickEvent(delay);
// Be sure to signal that there's some activity so the CPU doesn't
@@ -653,7 +653,7 @@ FullO3CPU<Impl>::activateContext(ThreadID tid, int delay)
activityRec.activity();
fetch.wakeFromQuiesce();
- lastActivatedCycle = curTick;
+ lastActivatedCycle = curTick();
_status = Running;
}
@@ -666,7 +666,7 @@ FullO3CPU<Impl>::deallocateContext(ThreadID tid, bool remove, int delay)
// Schedule removal of thread data from CPU
if (delay){
DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to deallocate "
- "on cycle %d\n", tid, curTick + ticks(delay));
+ "on cycle %d\n", tid, curTick() + ticks(delay));
scheduleDeallocateContextEvent(tid, remove, delay);
return false;
} else {
@@ -1552,8 +1552,8 @@ FullO3CPU<Impl>::wakeCPU()
DPRINTF(Activity, "Waking up CPU\n");
- idleCycles += tickToCycles((curTick - 1) - lastRunningCycle);
- numCycles += tickToCycles((curTick - 1) - lastRunningCycle);
+ idleCycles += tickToCycles((curTick() - 1) - lastRunningCycle);
+ numCycles += tickToCycles((curTick() - 1) - lastRunningCycle);
schedule(tickEvent, nextCycle());
}
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 832d98f55..e3d13c840 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -140,9 +140,9 @@ class FullO3CPU : public BaseO3CPU
void scheduleTickEvent(int delay)
{
if (tickEvent.squashed())
- reschedule(tickEvent, nextCycle(curTick + ticks(delay)));
+ reschedule(tickEvent, nextCycle(curTick() + ticks(delay)));
else if (!tickEvent.scheduled())
- schedule(tickEvent, nextCycle(curTick + ticks(delay)));
+ schedule(tickEvent, nextCycle(curTick() + ticks(delay)));
}
/** Unschedule tick event, regardless of its current state. */
@@ -182,10 +182,10 @@ class FullO3CPU : public BaseO3CPU
// Schedule thread to activate, regardless of its current state.
if (activateThreadEvent[tid].squashed())
reschedule(activateThreadEvent[tid],
- nextCycle(curTick + ticks(delay)));
+ nextCycle(curTick() + ticks(delay)));
else if (!activateThreadEvent[tid].scheduled())
schedule(activateThreadEvent[tid],
- nextCycle(curTick + ticks(delay)));
+ nextCycle(curTick() + ticks(delay)));
}
/** Unschedule actiavte thread event, regardless of its current state. */
@@ -235,10 +235,10 @@ class FullO3CPU : public BaseO3CPU
// Schedule thread to activate, regardless of its current state.
if (deallocateContextEvent[tid].squashed())
reschedule(deallocateContextEvent[tid],
- nextCycle(curTick + ticks(delay)));
+ nextCycle(curTick() + ticks(delay)));
else if (!deallocateContextEvent[tid].scheduled())
schedule(deallocateContextEvent[tid],
- nextCycle(curTick + ticks(delay)));
+ nextCycle(curTick() + ticks(delay)));
}
/** Unschedule thread deallocation in CPU */
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index cca6b7a57..28ef423c4 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -68,7 +68,7 @@ Tick
DefaultFetch<Impl>::IcachePort::recvAtomic(PacketPtr pkt)
{
panic("DefaultFetch doesn't expect recvAtomic callback!");
- return curTick;
+ return curTick();
}
template<class Impl>
@@ -625,7 +625,7 @@ DefaultFetch<Impl>::fetchCacheLine(Addr vaddr, Fault &ret_fault, ThreadID tid,
DPRINTF(Fetch, "[tid:%i]: Doing cache access.\n", tid);
- lastIcacheStall[tid] = curTick;
+ lastIcacheStall[tid] = curTick();
DPRINTF(Activity, "[tid:%i]: Activity: Waiting on I-cache "
"response.\n", tid);
@@ -992,7 +992,7 @@ DefaultFetch<Impl>::buildInst(ThreadID tid, StaticInstPtr staticInst,
#if TRACING_ON
if (trace) {
instruction->traceData =
- cpu->getTracer()->getInstRecord(curTick, cpu->tcBase(tid),
+ cpu->getTracer()->getInstRecord(curTick(), cpu->tcBase(tid),
instruction->staticInst, thisPC, curMacroop);
}
#else
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index b944979f2..ce408dfd0 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -754,7 +754,7 @@ InstructionQueue<Impl>::scheduleReadyInsts()
FUCompletion *execution = new FUCompletion(issuing_inst,
idx, this);
- cpu->schedule(execution, curTick + cpu->ticks(op_latency - 1));
+ cpu->schedule(execution, curTick() + cpu->ticks(op_latency - 1));
// @todo: Enforce that issue_latency == 1 or op_latency
if (issue_latency > 1) {
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index e780b14e4..ddfc63754 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -55,7 +55,7 @@ Tick
LSQ<Impl>::DcachePort::recvAtomic(PacketPtr pkt)
{
panic("O3CPU model does not work with atomic mode!");
- return curTick;
+ return curTick();
}
template <class Impl>
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index e9e3fea96..2bb42cadc 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -624,7 +624,7 @@ LSQUnit<Impl>::read(Request *req, Request *sreqLow, Request *sreqHigh,
// We'll say this has a 1 cycle load-store forwarding latency
// for now.
// @todo: Need to make this a parameter.
- cpu->schedule(wb, curTick);
+ cpu->schedule(wb, curTick());
// Don't need to do anything special for split loads.
if (TheISA::HasUnalignedMemAcc && sreqLow) {
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 807c0b527..64d674666 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -783,7 +783,7 @@ LSQUnit<Impl>::writebackStores()
"Instantly completing it.\n",
inst->seqNum);
WritebackEvent *wb = new WritebackEvent(inst, data_pkt, this);
- cpu->schedule(wb, curTick + 1);
+ cpu->schedule(wb, curTick() + 1);
completeStore(storeWBIdx);
incrStIdx(storeWBIdx);
continue;
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index 060baed32..e7b0540d1 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -115,7 +115,7 @@ O3ThreadContext<Impl>::activate(int delay)
return;
#if FULL_SYSTEM
- thread->lastActivate = curTick;
+ thread->lastActivate = curTick();
#endif
thread->setStatus(ThreadContext::Active);
@@ -135,8 +135,8 @@ O3ThreadContext<Impl>::suspend(int delay)
return;
#if FULL_SYSTEM
- thread->lastActivate = curTick;
- thread->lastSuspend = curTick;
+ thread->lastActivate = curTick();
+ thread->lastSuspend = curTick();
#endif
/*
#if FULL_SYSTEM
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-28 21:10:07 +0000