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-rw-r--r--src/cpu/o3/cpu.cc15
-rw-r--r--src/cpu/o3/cpu.hh3
-rw-r--r--src/cpu/o3/dyn_inst.hh2
-rw-r--r--src/cpu/o3/dyn_inst_impl.hh22
4 files changed, 0 insertions, 42 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index eb1115565..174f4a98d 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -906,21 +906,6 @@ FullO3CPU<Impl>::post_interrupt(int int_num, int index)
}
template <class Impl>
-Fault
-FullO3CPU<Impl>::hwrei(unsigned tid)
-{
-#if THE_ISA == ALPHA_ISA
- // Need to clear the lock flag upon returning from an interrupt.
- this->setMiscRegNoEffect(AlphaISA::MISCREG_LOCKFLAG, false, tid);
-
- this->thread[tid]->kernelStats->hwrei();
-
- // FIXME: XXX check for interrupts? XXX
-#endif
- return NoFault;
-}
-
-template <class Impl>
bool
FullO3CPU<Impl>::simPalCheck(int palFunc, unsigned tid)
{
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 406d965be..cdc1d2e58 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -414,9 +414,6 @@ class FullO3CPU : public BaseO3CPU
/** Posts an interrupt. */
void post_interrupt(int int_num, int index);
- /** HW return from error interrupt. */
- Fault hwrei(unsigned tid);
-
bool simPalCheck(int palFunc, unsigned tid);
/** Returns the Fault for any valid interrupt. */
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 292547b6b..ce59d802b 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -168,8 +168,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
}
#if FULL_SYSTEM
- /** Calls hardware return from error interrupt. */
- Fault hwrei();
/** Traps to handle specified fault. */
void trap(Fault fault);
bool simPalCheck(int palFunc);
diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index 6398a3afe..f85527f22 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -125,28 +125,6 @@ BaseO3DynInst<Impl>::completeAcc(PacketPtr pkt)
#if FULL_SYSTEM
template <class Impl>
-Fault
-BaseO3DynInst<Impl>::hwrei()
-{
-#if THE_ISA == ALPHA_ISA
- // Can only do a hwrei when in pal mode.
- if (!(this->readPC() & 0x3))
- return new AlphaISA::UnimplementedOpcodeFault;
-
- // Set the next PC based on the value of the EXC_ADDR IPR.
- this->setNextPC(this->cpu->readMiscRegNoEffect(AlphaISA::IPR_EXC_ADDR,
- this->threadNumber));
-
- // Tell CPU to clear any state it needs to if a hwrei is taken.
- this->cpu->hwrei(this->threadNumber);
-#else
-
-#endif
- // FIXME: XXX check for interrupts? XXX
- return NoFault;
-}
-
-template <class Impl>
void
BaseO3DynInst<Impl>::trap(Fault fault)
{