diff options
Diffstat (limited to 'src/cpu/o3')
| -rw-r--r-- | src/cpu/o3/fetch.hh | 4 | ||||
| -rw-r--r-- | src/cpu/o3/fetch_impl.hh | 11 | ||||
| -rwxr-xr-x | src/cpu/o3/thread_context.hh | 2 |
3 files changed, 11 insertions, 6 deletions
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh index 6d93f2cc8..d09d7f680 100644 --- a/src/cpu/o3/fetch.hh +++ b/src/cpu/o3/fetch.hh @@ -48,6 +48,7 @@ #include "arch/utility.hh" #include "base/statistics.hh" #include "config/the_isa.hh" +#include "cpu/decode.hh" #include "cpu/pc_event.hh" #include "cpu/timebuf.hh" #include "cpu/translation.hh" @@ -380,6 +381,9 @@ class DefaultFetch return (addr & ~(cacheBlkMask)); } + /** The decoder. */ + Decoder decoder; + private: DynInstPtr buildInst(ThreadID tid, StaticInstPtr staticInst, StaticInstPtr curMacroop, TheISA::PCState thisPC, diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index 86f5df9c7..b0ec349dc 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -725,7 +725,7 @@ DefaultFetch<Impl>::finishTranslation(Fault fault, RequestPtr mem_req) DPRINTF(Fetch, "[tid:%i]: Translation faulted, building noop.\n", tid); // We will use a nop in ordier to carry the fault. DynInstPtr instruction = buildInst(tid, - StaticInstPtr(TheISA::NoopMachInst, fetchPC.instAddr()), + decoder.decode(TheISA::NoopMachInst, fetchPC.instAddr()), NULL, fetchPC, fetchPC, false); instruction->setPredTarg(fetchPC); @@ -1287,11 +1287,10 @@ DefaultFetch<Impl>::fetch(bool &status_change) do { if (!(curMacroop || inRom)) { if (predecoder.extMachInstReady()) { - ExtMachInst extMachInst; - - extMachInst = predecoder.getExtMachInst(thisPC); - staticInst = StaticInstPtr(extMachInst, - thisPC.instAddr()); + ExtMachInst extMachInst = + predecoder.getExtMachInst(thisPC); + staticInst = + decoder.decode(extMachInst, thisPC.instAddr()); // Increment stat of fetched instructions. ++fetchedInsts; diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index ef0fdbb4d..38c94439a 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -73,6 +73,8 @@ class O3ThreadContext : public ThreadContext /** Returns a pointer to the DTB. */ TheISA::TLB *getDTBPtr() { return cpu->dtb; } + Decoder *getDecoderPtr() { return &cpu->fetch.decoder; } + /** Returns a pointer to this CPU. */ virtual BaseCPU *getCpuPtr() { return cpu; } |