diff options
Diffstat (limited to 'src/cpu/o3')
-rw-r--r-- | src/cpu/o3/O3CPU.py | 14 | ||||
-rw-r--r-- | src/cpu/o3/checker_builder.cc | 3 | ||||
-rw-r--r-- | src/cpu/o3/commit.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/commit_impl.hh | 53 | ||||
-rw-r--r-- | src/cpu/o3/cpu.cc | 132 | ||||
-rw-r--r-- | src/cpu/o3/cpu.hh | 7 | ||||
-rw-r--r-- | src/cpu/o3/cpu_builder.cc | 32 | ||||
-rw-r--r-- | src/cpu/o3/decode_impl.hh | 23 | ||||
-rw-r--r-- | src/cpu/o3/dyn_inst.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/dyn_inst_impl.hh | 27 | ||||
-rw-r--r-- | src/cpu/o3/fetch_impl.hh | 22 | ||||
-rw-r--r-- | src/cpu/o3/iew.hh | 1 | ||||
-rw-r--r-- | src/cpu/o3/lsq.hh | 3 | ||||
-rw-r--r-- | src/cpu/o3/lsq_impl.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/lsq_unit.hh | 1 | ||||
-rw-r--r-- | src/cpu/o3/regfile.hh | 8 | ||||
-rw-r--r-- | src/cpu/o3/rename_impl.hh | 1 | ||||
-rw-r--r-- | src/cpu/o3/rob_impl.hh | 1 | ||||
-rwxr-xr-x | src/cpu/o3/thread_context.hh | 25 | ||||
-rwxr-xr-x | src/cpu/o3/thread_context_impl.hh | 79 | ||||
-rw-r--r-- | src/cpu/o3/thread_state.hh | 54 |
21 files changed, 196 insertions, 296 deletions
diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py index 2a5b6782f..1d8950a73 100644 --- a/src/cpu/o3/O3CPU.py +++ b/src/cpu/o3/O3CPU.py @@ -40,15 +40,11 @@ class DerivO3CPU(BaseCPU): activity = Param.Unsigned(0, "Initial count") if buildEnv['USE_CHECKER']: - if not buildEnv['FULL_SYSTEM']: - checker = Param.BaseCPU(O3Checker(workload=Parent.workload, - exitOnError=False, - updateOnError=True, - warnOnlyOnLoadError=False), - "checker") - else: - checker = Param.BaseCPU(O3Checker(exitOnError=False, updateOnError=True, - warnOnlyOnLoadError=False), "checker") + checker = Param.BaseCPU(O3Checker(workload=Parent.workload, + exitOnError=False, + updateOnError=True, + warnOnlyOnLoadError=False), + "checker") checker.itb = Parent.itb checker.dtb = Parent.dtb diff --git a/src/cpu/o3/checker_builder.cc b/src/cpu/o3/checker_builder.cc index 5d0bd2ed2..b34613f68 100644 --- a/src/cpu/o3/checker_builder.cc +++ b/src/cpu/o3/checker_builder.cc @@ -90,11 +90,8 @@ O3CheckerParams::create() params->dtb = dtb; params->system = system; params->cpu_id = cpu_id; -#if FULL_SYSTEM params->profile = profile; -#else params->process = workload; -#endif O3Checker *cpu = new O3Checker(params); return cpu; diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh index ffc2c16d2..b45d37df9 100644 --- a/src/cpu/o3/commit.hh +++ b/src/cpu/o3/commit.hh @@ -267,13 +267,11 @@ class DefaultCommit void squashAfter(ThreadID tid, DynInstPtr &head_inst, uint64_t squash_after_seq_num); -#if FULL_SYSTEM /** Handles processing an interrupt. */ void handleInterrupt(); /** Get fetch redirecting so we can handle an interrupt */ void propagateInterrupt(); -#endif // FULL_SYSTEM /** Commits as many instructions as possible. */ void commitInsts(); diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 9ff31a622..b6a4c0387 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -47,7 +47,6 @@ #include "arch/utility.hh" #include "base/loader/symtab.hh" #include "base/cp_annotate.hh" -#include "config/full_system.hh" #include "config/the_isa.hh" #include "config/use_checker.hh" #include "cpu/o3/commit.hh" @@ -62,6 +61,7 @@ #include "debug/O3PipeView.hh" #include "params/DerivO3CPU.hh" #include "sim/faults.hh" +#include "sim/full_system.hh" #if USE_CHECKER #include "cpu/checker/cpu.hh" @@ -149,9 +149,7 @@ DefaultCommit<Impl>::DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params) pc[tid].set(0); lastCommitedSeqNum[tid] = 0; } -#if FULL_SYSTEM interrupt = NoFault; -#endif } template <class Impl> @@ -701,7 +699,6 @@ DefaultCommit<Impl>::tick() updateStatus(); } -#if FULL_SYSTEM template <class Impl> void DefaultCommit<Impl>::handleInterrupt() @@ -767,22 +764,20 @@ DefaultCommit<Impl>::propagateInterrupt() toIEW->commitInfo[0].interruptPending = true; } -#endif // FULL_SYSTEM - template <class Impl> void DefaultCommit<Impl>::commit() { - -#if FULL_SYSTEM - // Check for any interrupt that we've already squashed for and start processing it. - if (interrupt != NoFault) - handleInterrupt(); - - // Check if we have a interrupt and get read to handle it - if (cpu->checkInterrupts(cpu->tcBase(0))) - propagateInterrupt(); -#endif // FULL_SYSTEM + if (FullSystem) { + // Check for any interrupt that we've already squashed for and start + // processing it. + if (interrupt != NoFault) + handleInterrupt(); + + // Check if we have a interrupt and get read to handle it + if (cpu->checkInterrupts(cpu->tcBase(0))) + propagateInterrupt(); + } //////////////////////////////////// // Check for any possible squashes, handle them first @@ -1176,22 +1171,22 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num) updateComInstStats(head_inst); -#if FULL_SYSTEM - if (thread[tid]->profile) { - thread[tid]->profilePC = head_inst->instAddr(); - ProfileNode *node = thread[tid]->profile->consume(thread[tid]->getTC(), - head_inst->staticInst); + if (FullSystem) { + if (thread[tid]->profile) { + thread[tid]->profilePC = head_inst->instAddr(); + ProfileNode *node = thread[tid]->profile->consume( + thread[tid]->getTC(), head_inst->staticInst); - if (node) - thread[tid]->profileNode = node; - } - if (CPA::available()) { - if (head_inst->isControl()) { - ThreadContext *tc = thread[tid]->getTC(); - CPA::cpa()->swAutoBegin(tc, head_inst->nextInstAddr()); + if (node) + thread[tid]->profileNode = node; + } + if (CPA::available()) { + if (head_inst->isControl()) { + ThreadContext *tc = thread[tid]->getTC(); + CPA::cpa()->swAutoBegin(tc, head_inst->nextInstAddr()); + } } } -#endif DPRINTF(Commit, "Committing instruction with [sn:%lli] PC %s\n", head_inst->seqNum, head_inst->pcState()); if (head_inst->traceData) { diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 94fc5cdf3..5d3af6c70 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -31,13 +31,14 @@ * Rick Strong */ -#include "config/full_system.hh" +#include "arch/kernel_stats.hh" #include "config/the_isa.hh" #include "config/use_checker.hh" #include "cpu/o3/cpu.hh" #include "cpu/o3/isa_specific.hh" #include "cpu/o3/thread_context.hh" #include "cpu/activity.hh" +#include "cpu/quiesce_event.hh" #include "cpu/simple_thread.hh" #include "cpu/thread_context.hh" #include "debug/Activity.hh" @@ -45,15 +46,11 @@ #include "debug/Quiesce.hh" #include "enums/MemoryMode.hh" #include "sim/core.hh" +#include "sim/full_system.hh" +#include "sim/process.hh" #include "sim/stat_control.hh" #include "sim/system.hh" -#if FULL_SYSTEM -#include "cpu/quiesce_event.hh" -#else -#include "sim/process.hh" -#endif - #if USE_CHECKER #include "cpu/checker/cpu.hh" #endif @@ -218,18 +215,16 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params) if (params->checker) { BaseCPU *temp_checker = params->checker; checker = dynamic_cast<Checker<DynInstPtr> *>(temp_checker); -#if FULL_SYSTEM checker->setSystem(params->system); -#endif } else { checker = NULL; } #endif // USE_CHECKER -#if !FULL_SYSTEM - thread.resize(numThreads); - tids.resize(numThreads); -#endif + if (!FullSystem) { + thread.resize(numThreads); + tids.resize(numThreads); + } // The stages also need their CPU pointer setup. However this // must be done at the upper level CPU because they have pointers @@ -265,17 +260,18 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params) rename.setIEWStage(&iew); rename.setCommitStage(&commit); -#if !FULL_SYSTEM - ThreadID active_threads = params->workload.size(); + ThreadID active_threads; + if (FullSystem) { + active_threads = 1; + } else { + active_threads = params->workload.size(); - if (active_threads > Impl::MaxThreads) { - panic("Workload Size too large. Increase the 'MaxThreads'" - "constant in your O3CPU impl. file (e.g. o3/alpha/impl.hh) or " - "edit your workload size."); + if (active_threads > Impl::MaxThreads) { + panic("Workload Size too large. Increase the 'MaxThreads' " + "constant in your O3CPU impl. file (e.g. o3/alpha/impl.hh) " + "or edit your workload size."); + } } -#else - ThreadID active_threads = 1; -#endif //Make Sure That this a Valid Architeture assert(params->numPhysIntRegs >= numThreads * TheISA::NumIntRegs); @@ -354,31 +350,31 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params) this->thread.resize(this->numThreads); for (ThreadID tid = 0; tid < this->numThreads; ++tid) { -#if FULL_SYSTEM - // SMT is not supported in FS mode yet. - assert(this->numThreads == 1); - this->thread[tid] = new Thread(this, 0); -#else - if (tid < params->workload.size()) { - DPRINTF(O3CPU, "Workload[%i] process is %#x", - tid, this->thread[tid]); - this->thread[tid] = new typename FullO3CPU<Impl>::Thread( - (typename Impl::O3CPU *)(this), - tid, params->workload[tid]); - - //usedTids[tid] = true; - //threadMap[tid] = tid; + if (FullSystem) { + // SMT is not supported in FS mode yet. + assert(this->numThreads == 1); + this->thread[tid] = new Thread(this, 0, NULL); } else { - //Allocate Empty thread so M5 can use later - //when scheduling threads to CPU - Process* dummy_proc = NULL; - - this->thread[tid] = new typename FullO3CPU<Impl>::Thread( - (typename Impl::O3CPU *)(this), - tid, dummy_proc); - //usedTids[tid] = false; + if (tid < params->workload.size()) { + DPRINTF(O3CPU, "Workload[%i] process is %#x", + tid, this->thread[tid]); + this->thread[tid] = new typename FullO3CPU<Impl>::Thread( + (typename Impl::O3CPU *)(this), + tid, params->workload[tid]); + + //usedTids[tid] = true; + //threadMap[tid] = tid; + } else { + //Allocate Empty thread so M5 can use later + //when scheduling threads to CPU + Process* dummy_proc = NULL; + + this->thread[tid] = new typename FullO3CPU<Impl>::Thread( + (typename Impl::O3CPU *)(this), + tid, dummy_proc); + //usedTids[tid] = false; + } } -#endif // !FULL_SYSTEM ThreadContext *tc; @@ -400,10 +396,10 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params) assert(o3_tc->cpu); o3_tc->thread = this->thread[tid]; -#if FULL_SYSTEM - // Setup quiesce event. - this->thread[tid]->quiesceEvent = new EndQuiesceEvent(tc); -#endif + if (FullSystem) { + // Setup quiesce event. + this->thread[tid]->quiesceEvent = new EndQuiesceEvent(tc); + } // Give the thread the TC. this->thread[tid]->tc = tc; @@ -556,9 +552,8 @@ FullO3CPU<Impl>::tick() commit.tick(); -#if !FULL_SYSTEM - doContextSwitch(); -#endif + if (!FullSystem) + doContextSwitch(); // Now advance the time buffers timeBuffer.advance(); @@ -590,9 +585,8 @@ FullO3CPU<Impl>::tick() } } -#if !FULL_SYSTEM - updateThreadPriority(); -#endif + if (!FullSystem) + updateThreadPriority(); } template <class Impl> @@ -606,12 +600,12 @@ FullO3CPU<Impl>::init() for (ThreadID tid = 0; tid < numThreads; ++tid) thread[tid]->inSyscall = true; -#if FULL_SYSTEM - for (ThreadID tid = 0; tid < numThreads; tid++) { - ThreadContext *src_tc = threadContexts[tid]; - TheISA::initCPU(src_tc, src_tc->contextId()); + if (FullSystem) { + for (ThreadID tid = 0; tid < numThreads; tid++) { + ThreadContext *src_tc = threadContexts[tid]; + TheISA::initCPU(src_tc, src_tc->contextId()); + } } -#endif // Clear inSyscall. for (int tid = 0; tid < numThreads; ++tid) @@ -752,11 +746,11 @@ FullO3CPU<Impl>::insertThread(ThreadID tid) DPRINTF(O3CPU,"[tid:%i] Initializing thread into CPU"); // Will change now that the PC and thread state is internal to the CPU // and not in the ThreadContext. -#if FULL_SYSTEM - ThreadContext *src_tc = system->threadContexts[tid]; -#else - ThreadContext *src_tc = tcBase(tid); -#endif + ThreadContext *src_tc; + if (FullSystem) + src_tc = system->threadContexts[tid]; + else + src_tc = tcBase(tid); //Bind Int Regs to Rename Map for (int ireg = 0; ireg < TheISA::NumIntRegs; ireg++) { @@ -907,7 +901,6 @@ FullO3CPU<Impl>::activateWhenReady(ThreadID tid) } } -#if FULL_SYSTEM template <class Impl> Fault FullO3CPU<Impl>::hwrei(ThreadID tid) @@ -984,7 +977,6 @@ FullO3CPU<Impl>::updateMemPorts() for (ThreadID i = 0; i < size; ++i) thread[i]->connectMemPorts(thread[i]->getTC()); } -#endif template <class Impl> void @@ -994,8 +986,6 @@ FullO3CPU<Impl>::trap(Fault fault, ThreadID tid, StaticInstPtr inst) fault->invoke(this->threadContexts[tid], inst); } -#if !FULL_SYSTEM - template <class Impl> void FullO3CPU<Impl>::syscall(int64_t callnum, ThreadID tid) @@ -1016,8 +1006,6 @@ FullO3CPU<Impl>::syscall(int64_t callnum, ThreadID tid) --(this->thread[tid]->funcExeInst); } -#endif - template <class Impl> void FullO3CPU<Impl>::serialize(std::ostream &os) @@ -1611,7 +1599,6 @@ FullO3CPU<Impl>::wakeCPU() schedule(tickEvent, nextCycle()); } -#if FULL_SYSTEM template <class Impl> void FullO3CPU<Impl>::wakeup() @@ -1624,7 +1611,6 @@ FullO3CPU<Impl>::wakeup() DPRINTF(Quiesce, "Suspended Processor woken\n"); this->threadContexts[0]->activate(); } -#endif template <class Impl> ThreadID diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index b2606c1e2..7580106ad 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -42,7 +42,6 @@ #include "arch/types.hh" #include "base/statistics.hh" -#include "config/full_system.hh" #include "config/the_isa.hh" #include "config/use_checker.hh" #include "cpu/o3/comm.hh" @@ -350,12 +349,10 @@ class FullO3CPU : public BaseO3CPU virtual void unserialize(Checkpoint *cp, const std::string §ion); public: -#if !FULL_SYSTEM /** Executes a syscall. * @todo: Determine if this needs to be virtual. */ void syscall(int64_t callnum, ThreadID tid); -#endif /** Starts draining the CPU's pipeline of all instructions in * order to stop all memory accesses. */ @@ -380,7 +377,6 @@ class FullO3CPU : public BaseO3CPU /** Traps to handle given fault. */ void trap(Fault fault, ThreadID tid, StaticInstPtr inst); -#if FULL_SYSTEM /** HW return from error interrupt. */ Fault hwrei(ThreadID tid); @@ -404,7 +400,6 @@ class FullO3CPU : public BaseO3CPU /** Check if this address is a valid data address. */ bool validDataAddr(Addr addr) { return true; } -#endif /** Register accessors. Index refers to the physical register index. */ @@ -633,9 +628,7 @@ class FullO3CPU : public BaseO3CPU /** Wakes the CPU, rescheduling the CPU if it's not already active. */ void wakeCPU(); -#if FULL_SYSTEM virtual void wakeup(); -#endif /** Gets a free thread id. Use if thread ids change across system. */ ThreadID getFreeTid(); diff --git a/src/cpu/o3/cpu_builder.cc b/src/cpu/o3/cpu_builder.cc index 097dc7181..296ad1793 100644 --- a/src/cpu/o3/cpu_builder.cc +++ b/src/cpu/o3/cpu_builder.cc @@ -30,7 +30,6 @@ #include <string> -#include "config/full_system.hh" #include "config/use_checker.hh" #include "cpu/o3/cpu.hh" #include "cpu/o3/impl.hh" @@ -47,22 +46,23 @@ class DerivO3CPU : public FullO3CPU<O3CPUImpl> DerivO3CPU * DerivO3CPUParams::create() { -#if FULL_SYSTEM - // Full-system only supports a single thread for the moment. - ThreadID actual_num_threads = 1; -#else - if (workload.size() > numThreads) { - fatal("Workload Size (%i) > Max Supported Threads (%i) on This CPU", - workload.size(), numThreads); - } else if (workload.size() == 0) { - fatal("Must specify at least one workload!"); + ThreadID actual_num_threads; + if (FullSystem) { + // Full-system only supports a single thread for the moment. + actual_num_threads = 1; + } else { + if (workload.size() > numThreads) { + fatal("Workload Size (%i) > Max Supported Threads (%i) on This CPU", + workload.size(), numThreads); + } else if (workload.size() == 0) { + fatal("Must specify at least one workload!"); + } + + // In non-full-system mode, we infer the number of threads from + // the workload if it's not explicitly specified. + actual_num_threads = + (numThreads >= workload.size()) ? numThreads : workload.size(); } - - // In non-full-system mode, we infer the number of threads from - // the workload if it's not explicitly specified. - ThreadID actual_num_threads = - (numThreads >= workload.size()) ? numThreads : workload.size(); -#endif numThreads = actual_num_threads; diff --git a/src/cpu/o3/decode_impl.hh b/src/cpu/o3/decode_impl.hh index a523a8b45..985e92826 100644 --- a/src/cpu/o3/decode_impl.hh +++ b/src/cpu/o3/decode_impl.hh @@ -30,13 +30,13 @@ #include "arch/types.hh" #include "base/trace.hh" -#include "config/full_system.hh" #include "config/the_isa.hh" #include "cpu/o3/decode.hh" #include "cpu/inst_seq.hh" #include "debug/Activity.hh" #include "debug/Decode.hh" #include "params/DerivO3CPU.hh" +#include "sim/full_system.hh" using namespace std; @@ -322,19 +322,18 @@ DefaultDecode<Impl>::squash(ThreadID tid) if (decodeStatus[tid] == Blocked || decodeStatus[tid] == Unblocking) { -#if !FULL_SYSTEM - // In syscall emulation, we can have both a block and a squash due - // to a syscall in the same cycle. This would cause both signals to - // be high. This shouldn't happen in full system. - // @todo: Determine if this still happens. - if (toFetch->decodeBlock[tid]) { - toFetch->decodeBlock[tid] = 0; - } else { + if (FullSystem) { toFetch->decodeUnblock[tid] = 1; + } else { + // In syscall emulation, we can have both a block and a squash due + // to a syscall in the same cycle. This would cause both signals + // to be high. This shouldn't happen in full system. + // @todo: Determine if this still happens. + if (toFetch->decodeBlock[tid]) + toFetch->decodeBlock[tid] = 0; + else + toFetch->decodeUnblock[tid] = 1; } -#else - toFetch->decodeUnblock[tid] = 1; -#endif } // Set status to squashing. diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index e58eb99c5..1b101ede9 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -199,13 +199,11 @@ class BaseO3DynInst : public BaseDynInst<Impl> this->setFloatRegOperandBits(this->staticInst.get(), idx, this->cpu->readFloatRegBits(prev_phys_reg)); } } -#if FULL_SYSTEM /** Calls hardware return from error interrupt. */ Fault hwrei(); /** Traps to handle specified fault. */ void trap(Fault fault); bool simPalCheck(int palFunc); -#endif /** Emulates a syscall. */ void syscall(int64_t callnum); diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh index 500d63de8..93ae83441 100644 --- a/src/cpu/o3/dyn_inst_impl.hh +++ b/src/cpu/o3/dyn_inst_impl.hh @@ -42,6 +42,7 @@ #include "base/cp_annotate.hh" #include "cpu/o3/dyn_inst.hh" +#include "sim/full_system.hh" template <class Impl> BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst, @@ -143,7 +144,6 @@ BaseO3DynInst<Impl>::completeAcc(PacketPtr pkt) return this->fault; } -#if FULL_SYSTEM template <class Impl> Fault BaseO3DynInst<Impl>::hwrei() @@ -188,24 +188,23 @@ BaseO3DynInst<Impl>::simPalCheck(int palFunc) #endif return this->cpu->simPalCheck(palFunc, this->threadNumber); } -#endif template <class Impl> void BaseO3DynInst<Impl>::syscall(int64_t callnum) { -#if FULL_SYSTEM - panic("Syscall emulation isn't available in FS mode.\n"); -#else - // HACK: check CPU's nextPC before and after syscall. If it - // changes, update this instruction's nextPC because the syscall - // must have changed the nextPC. - TheISA::PCState curPC = this->cpu->pcState(this->threadNumber); - this->cpu->syscall(callnum, this->threadNumber); - TheISA::PCState newPC = this->cpu->pcState(this->threadNumber); - if (!(curPC == newPC)) { - this->pcState(newPC); + if (FullSystem) { + panic("Syscall emulation isn't available in FS mode.\n"); + } else { + // HACK: check CPU's nextPC before and after syscall. If it + // changes, update this instruction's nextPC because the syscall + // must have changed the nextPC. + TheISA::PCState curPC = this->cpu->pcState(this->threadNumber); + this->cpu->syscall(callnum, this->threadNumber); + TheISA::PCState newPC = this->cpu->pcState(this->threadNumber); + if (!(curPC == newPC)) { + this->pcState(newPC); + } } -#endif } diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index ccab47d2f..28fd434fe 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -45,7 +45,9 @@ #include <cstring> #include "arch/isa_traits.hh" +#include "arch/tlb.hh" #include "arch/utility.hh" +#include "arch/vtophys.hh" #include "base/types.hh" #include "config/the_isa.hh" #include "config/use_checker.hh" @@ -61,12 +63,8 @@ #include "sim/byteswap.hh" #include "sim/core.hh" #include "sim/eventq.hh" - -#if FULL_SYSTEM -#include "arch/tlb.hh" -#include "arch/vtophys.hh" +#include "sim/full_system.hh" #include "sim/system.hh" -#endif // FULL_SYSTEM using namespace std; @@ -907,15 +905,15 @@ DefaultFetch<Impl>::tick() DPRINTF(Fetch, "Running stage.\n"); - #if FULL_SYSTEM - if (fromCommit->commitInfo[0].interruptPending) { - interruptPending = true; - } + if (FullSystem) { + if (fromCommit->commitInfo[0].interruptPending) { + interruptPending = true; + } - if (fromCommit->commitInfo[0].clearInterrupt) { - interruptPending = false; + if (fromCommit->commitInfo[0].clearInterrupt) { + interruptPending = false; + } } -#endif for (threadFetched = 0; threadFetched < numFetchingThreads; threadFetched++) { diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh index 113d0756e..2c5858a51 100644 --- a/src/cpu/o3/iew.hh +++ b/src/cpu/o3/iew.hh @@ -47,7 +47,6 @@ #include <set> #include "base/statistics.hh" -#include "config/full_system.hh" #include "cpu/o3/comm.hh" #include "cpu/o3/lsq.hh" #include "cpu/o3/scoreboard.hh" diff --git a/src/cpu/o3/lsq.hh b/src/cpu/o3/lsq.hh index 14917bc16..1974af08f 100644 --- a/src/cpu/o3/lsq.hh +++ b/src/cpu/o3/lsq.hh @@ -34,7 +34,6 @@ #include <map> #include <queue> -#include "config/full_system.hh" #include "cpu/o3/lsq_unit.hh" #include "cpu/inst_seq.hh" #include "mem/port.hh" @@ -334,10 +333,8 @@ class LSQ { /** D-cache port. */ DcachePort dcachePort; -#if FULL_SYSTEM /** Tell the CPU to update the Phys and Virt ports. */ void updateMemPorts() { cpu->updateMemPorts(); } -#endif protected: /** The LSQ policy for SMT mode. */ diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh index ef9167d8c..8b1638c70 100644 --- a/src/cpu/o3/lsq_impl.hh +++ b/src/cpu/o3/lsq_impl.hh @@ -46,11 +46,9 @@ LSQ<Impl>::DcachePort::setPeer(Port *port) { Port::setPeer(port); -#if FULL_SYSTEM // Update the ThreadContext's memory ports (Functional/Virtual // Ports) lsq->updateMemPorts(); -#endif } template <class Impl> diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index 3c1af4533..0882dcf20 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -44,7 +44,6 @@ #include "arch/mmapped_ipr.hh" #include "base/fast_alloc.hh" #include "base/hashmap.hh" -#include "config/full_system.hh" #include "config/the_isa.hh" #include "cpu/inst_seq.hh" #include "cpu/timebuf.hh" diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh index d04f45cc0..117c955c2 100644 --- a/src/cpu/o3/regfile.hh +++ b/src/cpu/o3/regfile.hh @@ -35,17 +35,13 @@ #include <vector> #include "arch/isa_traits.hh" +#include "arch/kernel_stats.hh" #include "arch/types.hh" #include "base/trace.hh" -#include "config/full_system.hh" #include "config/the_isa.hh" #include "cpu/o3/comm.hh" #include "debug/IEW.hh" -#if FULL_SYSTEM -#include "arch/kernel_stats.hh" -#endif - /** * Simple physical register file class. * Right now this is specific to Alpha until we decide if/how to make things @@ -174,10 +170,8 @@ class PhysRegFile /** Floating point register file. */ PhysFloatReg *floatRegFile; -#if FULL_SYSTEM private: int intrflag; // interrupt flag -#endif private: /** CPU pointer. */ diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh index 98c0f231b..04935604e 100644 --- a/src/cpu/o3/rename_impl.hh +++ b/src/cpu/o3/rename_impl.hh @@ -45,7 +45,6 @@ #include "arch/isa_traits.hh" #include "arch/registers.hh" -#include "config/full_system.hh" #include "config/the_isa.hh" #include "cpu/o3/rename.hh" #include "debug/Activity.hh" diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh index dcde54a54..0484f519c 100644 --- a/src/cpu/o3/rob_impl.hh +++ b/src/cpu/o3/rob_impl.hh @@ -31,7 +31,6 @@ #include <list> -#include "config/full_system.hh" #include "cpu/o3/rob.hh" #include "debug/Fetch.hh" #include "debug/ROB.hh" diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index 38c94439a..815c9cb64 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -92,22 +92,22 @@ class O3ThreadContext : public ThreadContext /** Returns a pointer to the system. */ virtual System *getSystemPtr() { return cpu->system; } -#if FULL_SYSTEM /** Returns a pointer to this thread's kernel statistics. */ virtual TheISA::Kernel::Statistics *getKernelStats() { return thread->kernelStats; } - virtual FunctionalPort *getPhysPort() { return thread->getPhysPort(); } + virtual void connectMemPorts(ThreadContext *tc) + { thread->connectMemPorts(tc); } - virtual VirtualPort *getVirtPort(); + /** Returns a pointer to this thread's process. */ + virtual Process *getProcessPtr() { return thread->getProcessPtr(); } - virtual void connectMemPorts(ThreadContext *tc) { thread->connectMemPorts(tc); } -#else virtual TranslatingPort *getMemPort() { return thread->getMemPort(); } - /** Returns a pointer to this thread's process. */ - virtual Process *getProcessPtr() { return thread->getProcessPtr(); } -#endif + virtual VirtualPort *getVirtPort(); + + virtual FunctionalPort *getPhysPort() { return thread->getPhysPort(); } + /** Returns this thread's status. */ virtual Status status() const { return thread->status(); } @@ -125,12 +125,11 @@ class O3ThreadContext : public ThreadContext /** Set the status to Halted. */ virtual void halt(int delay = 0); -#if FULL_SYSTEM /** Dumps the function profiling information. * @todo: Implement. */ virtual void dumpFuncProfile(); -#endif + /** Takes over execution of a thread from another CPU. */ virtual void takeOverFrom(ThreadContext *old_context); @@ -142,7 +141,6 @@ class O3ThreadContext : public ThreadContext /** Unserializes state. */ virtual void unserialize(Checkpoint *cp, const std::string §ion); -#if FULL_SYSTEM /** Reads the last tick that this thread was activated on. */ virtual Tick readLastActivate(); /** Reads the last tick that this thread was suspended on. */ @@ -152,7 +150,6 @@ class O3ThreadContext : public ThreadContext virtual void profileClear(); /** Samples the function profiling information. */ virtual void profileSample(); -#endif /** Copies the architectural registers from another TC into this TC. */ virtual void copyArchRegs(ThreadContext *tc); @@ -229,20 +226,18 @@ class O3ThreadContext : public ThreadContext * misspeculating, this is set as false. */ virtual bool misspeculating() { return false; } -#if !FULL_SYSTEM /** Executes a syscall in SE mode. */ virtual void syscall(int64_t callnum) { return cpu->syscall(callnum, thread->threadId()); } /** Reads the funcExeInst counter. */ virtual Counter readFuncExeInst() { return thread->funcExeInst; } -#else + /** Returns pointer to the quiesce event. */ virtual EndQuiesceEvent *getQuiesceEvent() { return this->thread->quiesceEvent; } -#endif }; diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh index 4888cf92e..15fc397dc 100755 --- a/src/cpu/o3/thread_context_impl.hh +++ b/src/cpu/o3/thread_context_impl.hh @@ -41,13 +41,13 @@ * Korey Sewell */ +#include "arch/kernel_stats.hh" #include "arch/registers.hh" #include "config/the_isa.hh" #include "cpu/o3/thread_context.hh" #include "cpu/quiesce_event.hh" #include "debug/O3CPU.hh" -#if FULL_SYSTEM template <class Impl> VirtualPort * O3ThreadContext<Impl>::getVirtPort() @@ -61,18 +61,14 @@ O3ThreadContext<Impl>::dumpFuncProfile() { thread->dumpFuncProfile(); } -#endif template <class Impl> void O3ThreadContext<Impl>::takeOverFrom(ThreadContext *old_context) { // some things should already be set up -#if FULL_SYSTEM assert(getSystemPtr() == old_context->getSystemPtr()); -#else assert(getProcessPtr() == old_context->getProcessPtr()); -#endif // copy over functional state setStatus(old_context->status()); @@ -80,24 +76,23 @@ O3ThreadContext<Impl>::takeOverFrom(ThreadContext *old_context) setContextId(old_context->contextId()); setThreadId(old_context->threadId()); -#if !FULL_SYSTEM - thread->funcExeInst = old_context->readFuncExeInst(); -#else - EndQuiesceEvent *other_quiesce = old_context->getQuiesceEvent(); - if (other_quiesce) { - // Point the quiesce event's TC at this TC so that it wakes up - // the proper CPU. - other_quiesce->tc = this; + if (FullSystem) { + EndQuiesceEvent *other_quiesce = old_context->getQuiesceEvent(); + if (other_quiesce) { + // Point the quiesce event's TC at this TC so that it wakes up + // the proper CPU. + other_quiesce->tc = this; + } + if (thread->quiesceEvent) { + thread->quiesceEvent->tc = this; + } + + // Transfer kernel stats from one CPU to the other. + thread->kernelStats = old_context->getKernelStats(); + cpu->lockFlag = false; + } else { + thread->funcExeInst = old_context->readFuncExeInst(); } - if (thread->quiesceEvent) { - thread->quiesceEvent->tc = this; - } - - // Transfer kernel stats from one CPU to the other. - thread->kernelStats = old_context->getKernelStats(); -// storeCondFailures = 0; - cpu->lockFlag = false; -#endif old_context->setStatus(ThreadContext::Halted); @@ -115,10 +110,7 @@ O3ThreadContext<Impl>::activate(int delay) if (thread->status() == ThreadContext::Active) return; -#if FULL_SYSTEM thread->lastActivate = curTick(); -#endif - thread->setStatus(ThreadContext::Active); // status() == Suspended @@ -135,19 +127,9 @@ O3ThreadContext<Impl>::suspend(int delay) if (thread->status() == ThreadContext::Suspended) return; -#if FULL_SYSTEM thread->lastActivate = curTick(); thread->lastSuspend = curTick(); -#endif -/* -#if FULL_SYSTEM - // Don't change the status from active if there are pending interrupts - if (cpu->checkInterrupts()) { - assert(status() == ThreadContext::Active); - return; - } -#endif -*/ + thread->setStatus(ThreadContext::Suspended); cpu->suspendContext(thread->threadId()); } @@ -170,35 +152,28 @@ template <class Impl> void O3ThreadContext<Impl>::regStats(const std::string &name) { -#if FULL_SYSTEM - thread->kernelStats = new TheISA::Kernel::Statistics(cpu->system); - thread->kernelStats->regStats(name + ".kern"); -#endif + if (FullSystem) { + thread->kernelStats = new TheISA::Kernel::Statistics(cpu->system); + thread->kernelStats->regStats(name + ".kern"); + } } template <class Impl> void O3ThreadContext<Impl>::serialize(std::ostream &os) { -#if FULL_SYSTEM - if (thread->kernelStats) + if (FullSystem && thread->kernelStats) thread->kernelStats->serialize(os); -#endif - } template <class Impl> void O3ThreadContext<Impl>::unserialize(Checkpoint *cp, const std::string §ion) { -#if FULL_SYSTEM - if (thread->kernelStats) + if (FullSystem && thread->kernelStats) thread->kernelStats->unserialize(cp, section); -#endif - } -#if FULL_SYSTEM template <class Impl> Tick O3ThreadContext<Impl>::readLastActivate() @@ -226,7 +201,6 @@ O3ThreadContext<Impl>::profileSample() { thread->profileSample(); } -#endif template <class Impl> void @@ -237,9 +211,8 @@ O3ThreadContext<Impl>::copyArchRegs(ThreadContext *tc) TheISA::copyRegs(tc, this); thread->inSyscall = false; -#if !FULL_SYSTEM - this->thread->funcExeInst = tc->readFuncExeInst(); -#endif + if (!FullSystem) + this->thread->funcExeInst = tc->readFuncExeInst(); } template <class Impl> diff --git a/src/cpu/o3/thread_state.hh b/src/cpu/o3/thread_state.hh index 1171053b9..fc54ec33c 100644 --- a/src/cpu/o3/thread_state.hh +++ b/src/cpu/o3/thread_state.hh @@ -35,19 +35,15 @@ #include "base/output.hh" #include "cpu/thread_context.hh" #include "cpu/thread_state.hh" +#include "sim/full_system.hh" #include "sim/sim_exit.hh" -class Event; -class Process; - -#if FULL_SYSTEM class EndQuiesceEvent; -class FunctionProfile; -class ProfileNode; -#else +class Event; class FunctionalMemory; +class FunctionProfile; class Process; -#endif +class ProfileNode; /** * Class that has various thread state, such as the status, the @@ -75,31 +71,27 @@ struct O3ThreadState : public ThreadState { */ bool trapPending; -#if FULL_SYSTEM - O3ThreadState(O3CPU *_cpu, int _thread_num) - : ThreadState(_cpu, _thread_num), + O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process) + : ThreadState(_cpu, _thread_num, _process), cpu(_cpu), inSyscall(0), trapPending(0) { - if (cpu->params()->profile) { - profile = new FunctionProfile(cpu->params()->system->kernelSymtab); - Callback *cb = - new MakeCallback<O3ThreadState, - &O3ThreadState::dumpFuncProfile>(this); - registerExitCallback(cb); - } + if (FullSystem) { + if (cpu->params()->profile) { + profile = new FunctionProfile( + cpu->params()->system->kernelSymtab); + Callback *cb = + new MakeCallback<O3ThreadState, + &O3ThreadState::dumpFuncProfile>(this); + registerExitCallback(cb); + } - // let's fill with a dummy node for now so we don't get a segfault - // on the first cycle when there's no node available. - static ProfileNode dummyNode; - profileNode = &dummyNode; - profilePC = 3; + // let's fill with a dummy node for now so we don't get a segfault + // on the first cycle when there's no node available. + static ProfileNode dummyNode; + profileNode = &dummyNode; + profilePC = 3; + } } -#else - O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process) - : ThreadState(_cpu, _thread_num, _process), - cpu(_cpu), inSyscall(0), trapPending(0) - { } -#endif /** Pointer to the ThreadContext of this thread. */ ThreadContext *tc; @@ -107,18 +99,14 @@ struct O3ThreadState : public ThreadState { /** Returns a pointer to the TC of this thread. */ ThreadContext *getTC() { return tc; } -#if !FULL_SYSTEM /** Handles the syscall. */ void syscall(int64_t callnum) { process->syscall(callnum, tc); } -#endif -#if FULL_SYSTEM void dumpFuncProfile() { std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name())); profile->dump(tc, *os); } -#endif }; #endif // __CPU_O3_THREAD_STATE_HH__ |