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-rw-r--r--src/cpu/o3/cpu.hh4
-rw-r--r--src/cpu/o3/fetch_impl.hh2
-rwxr-xr-xsrc/cpu/o3/thread_context.hh4
3 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 28ccd15b0..10af087d1 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -123,8 +123,8 @@ class FullO3CPU : public BaseO3CPU
SwitchedOut
};
- TheISA::TLB * itb;
- TheISA::TLB * dtb;
+ BaseTLB *itb;
+ BaseTLB *dtb;
/** Overall CPU status. */
Status _status;
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 0cf8a47a7..6cca77a87 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -51,8 +51,8 @@
#include <map>
#include <queue>
+#include "arch/generic/tlb.hh"
#include "arch/isa_traits.hh"
-#include "arch/tlb.hh"
#include "arch/utility.hh"
#include "arch/vtophys.hh"
#include "base/random.hh"
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index ac4ceed02..2256a8a14 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -79,10 +79,10 @@ class O3ThreadContext : public ThreadContext
O3ThreadState<Impl> *thread;
/** Returns a pointer to the ITB. */
- TheISA::TLB *getITBPtr() { return cpu->itb; }
+ BaseTLB *getITBPtr() { return cpu->itb; }
/** Returns a pointer to the DTB. */
- TheISA::TLB *getDTBPtr() { return cpu->dtb; }
+ BaseTLB *getDTBPtr() { return cpu->dtb; }
CheckerCPU *getCheckerCpuPtr() { return NULL; }