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-rw-r--r--src/cpu/o3/fetch_impl.hh5
-rw-r--r--src/cpu/o3/lsq_impl.hh9
2 files changed, 12 insertions, 2 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 07d4ebb42..54b652813 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -80,7 +80,10 @@ template<class Impl>
bool
DefaultFetch<Impl>::IcachePort::recvTiming(Packet *pkt)
{
- fetch->processCacheCompletion(pkt);
+ if (pkt->isResponse()) {
+ fetch->processCacheCompletion(pkt);
+ }
+ //else Snooped a coherence request, just return
return true;
}
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index 7b7d1eb8e..337ee0372 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -63,7 +63,14 @@ template <class Impl>
bool
LSQ<Impl>::DcachePort::recvTiming(PacketPtr pkt)
{
- lsq->thread[pkt->req->getThreadNum()].completeDataAccess(pkt);
+ if (pkt->isResponse()) {
+ lsq->thread[pkt->req->getThreadNum()].completeDataAccess(pkt);
+ }
+ else {
+ //else it is a coherence request, maybe you need to do something
+ warn("Recieved a coherence request (Invalidate??), 03CPU doesn't"
+ "update LSQ for these\n");
+ }
return true;
}