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-rw-r--r--src/cpu/o3/cpu.cc6
-rw-r--r--src/cpu/o3/cpu.hh5
-rw-r--r--src/cpu/o3/fetch.hh2
3 files changed, 3 insertions, 10 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index feca4cdf2..fb7739db8 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -714,9 +714,8 @@ FullO3CPU<Impl>::haltContext(int tid)
template <class Impl>
void
-FullO3CPU<Impl>::switchOut(Sampler *_sampler)
+FullO3CPU<Impl>::switchOut()
{
- sampler = _sampler;
switchCount = 0;
fetch.switchOut();
decode.switchOut();
@@ -745,12 +744,11 @@ FullO3CPU<Impl>::signalSwitched()
#if USE_CHECKER
if (checker)
- checker->switchOut(sampler);
+ checker->switchOut();
#endif
if (tickEvent.scheduled())
tickEvent.squash();
- sampler->signalSwitched();
_status = SwitchedOut;
}
assert(switchCount <= 5);
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 1cff6142d..bd0451601 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -271,7 +271,7 @@ class FullO3CPU : public BaseO3CPU
virtual void syscall(int tid) { panic("Unimplemented!"); }
/** Switches out this CPU. */
- void switchOut(Sampler *sampler);
+ void switchOut();
/** Signals to this CPU that a stage has completed switching out. */
void signalSwitched();
@@ -550,9 +550,6 @@ class FullO3CPU : public BaseO3CPU
/** Pointer to memory. */
MemObject *mem;
- /** Pointer to the sampler */
- Sampler *sampler;
-
/** Counter of how many stages have completed switching out. */
int switchCount;
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh
index 7fcd21b7d..848ebf39e 100644
--- a/src/cpu/o3/fetch.hh
+++ b/src/cpu/o3/fetch.hh
@@ -40,8 +40,6 @@
#include "mem/port.hh"
#include "sim/eventq.hh"
-class Sampler;
-
/**
* DefaultFetch class handles both single threaded and SMT fetch. Its
* width is specified by the parameters; each cycle it tries to fetch