4 files changed, 40 insertions, 22 deletions

diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index bfc9438d3..fe70c3fcf 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011 ARM Limited
+ * Copyright (c) 2011-2012 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -89,14 +89,12 @@ template<class Impl>
 bool
 FullO3CPU<Impl>::IcachePort::recvTiming(PacketPtr pkt)
 {
+    assert(pkt->isResponse());
     DPRINTF(O3CPU, "Fetch unit received timing\n");
-    if (pkt->isResponse()) {
-        // We shouldn't ever get a block in ownership state
-        assert(!(pkt->memInhibitAsserted() && !pkt->sharedAsserted()));
+    // We shouldn't ever get a block in ownership state
+    assert(!(pkt->memInhibitAsserted() && !pkt->sharedAsserted()));
+    fetch->processCacheCompletion(pkt);
 
-        fetch->processCacheCompletion(pkt);
-    }
-    //else Snooped a coherence request, just return
     return true;
 }
 
@@ -111,10 +109,19 @@ template <class Impl>
 bool
 FullO3CPU<Impl>::DcachePort::recvTiming(PacketPtr pkt)
 {
+    assert(pkt->isResponse());
     return lsq->recvTiming(pkt);
 }
 
 template <class Impl>
+bool
+FullO3CPU<Impl>::DcachePort::recvTimingSnoop(PacketPtr pkt)
+{
+    assert(pkt->isRequest());
+    return lsq->recvTimingSnoop(pkt);
+}
+
+template <class Impl>
 void
 FullO3CPU<Impl>::DcachePort::recvRetry()
 {
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 493730458..be51f415f 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -149,6 +149,7 @@ class FullO3CPU : public BaseO3CPU
         /** Timing version of receive.  Handles setting fetch to the
          * proper status to start fetching. */
         virtual bool recvTiming(PacketPtr pkt);
+        virtual bool recvTimingSnoop(PacketPtr pkt) { return true; }
 
         /** Handles doing a retry of a failed fetch. */
         virtual void recvRetry();
@@ -176,6 +177,7 @@ class FullO3CPU : public BaseO3CPU
          * completing the load or store that has returned from
          * memory. */
         virtual bool recvTiming(PacketPtr pkt);
+        virtual bool recvTimingSnoop(PacketPtr pkt);
 
         /** Handles doing a retry of the previous send. */
         virtual void recvRetry();
diff --git a/src/cpu/o3/lsq.hh b/src/cpu/o3/lsq.hh
index b821dd3f9..dac5fab18 100644
--- a/src/cpu/o3/lsq.hh
+++ b/src/cpu/o3/lsq.hh
@@ -299,6 +299,8 @@ class LSQ {
      */
     bool recvTiming(PacketPtr pkt);
 
+    bool recvTimingSnoop(PacketPtr pkt);
+
     /** The CPU pointer. */
     O3CPU *cpu;
 
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index 02758f212..c2f410e37 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011 ARM Limited
+ * Copyright (c) 2011-2012 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -321,25 +321,32 @@ template <class Impl>
 bool
 LSQ<Impl>::recvTiming(PacketPtr pkt)
 {
+    assert(pkt->isResponse());
     if (pkt->isError())
         DPRINTF(LSQ, "Got error packet back for address: %#X\n",
                 pkt->getAddr());
-    if (pkt->isResponse()) {
-        thread[pkt->req->threadId()].completeDataAccess(pkt);
-    } else {
-        DPRINTF(LSQ, "received pkt for addr:%#x %s\n", pkt->getAddr(),
-                pkt->cmdString());
-
-        // must be a snoop
-        if (pkt->isInvalidate()) {
-            DPRINTF(LSQ, "received invalidation for addr:%#x\n",
-                    pkt->getAddr());
-            for (ThreadID tid = 0; tid < numThreads; tid++) {
-                thread[tid].checkSnoop(pkt);
-            }
+    thread[pkt->req->threadId()].completeDataAccess(pkt);
+    return true;
+}
+
+template <class Impl>
+bool
+LSQ<Impl>::recvTimingSnoop(PacketPtr pkt)
+{
+    assert(pkt->isRequest());
+    DPRINTF(LSQ, "received pkt for addr:%#x %s\n", pkt->getAddr(),
+            pkt->cmdString());
+
+    // must be a snoop
+    if (pkt->isInvalidate()) {
+        DPRINTF(LSQ, "received invalidation for addr:%#x\n",
+                pkt->getAddr());
+        for (ThreadID tid = 0; tid < numThreads; tid++) {
+            thread[tid].checkSnoop(pkt);
         }
-        // to provide stronger consistency model
     }
+
+    // to provide stronger consistency model
     return true;
 }