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-rw-r--r--src/cpu/o3/commit_impl.hh6
-rwxr-xr-xsrc/cpu/o3/thread_context.hh4
-rwxr-xr-xsrc/cpu/o3/thread_context_impl.hh7
3 files changed, 0 insertions, 17 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 468781e4d..87f18d4e4 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1033,12 +1033,6 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
}
#endif
- // DTB will sometimes need the machine instruction for when
- // faults happen. So we will set it here, prior to the DTB
- // possibly needing it for its fault.
- thread[tid]->setInst(
- static_cast<TheISA::MachInst>(head_inst->staticInst->machInst));
-
if (inst_fault != NoFault) {
DPRINTF(Commit, "Inst [sn:%lli] PC %#x has a fault\n",
head_inst->seqNum, head_inst->readPC());
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index 78b266014..b7790cfda 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -151,10 +151,6 @@ class O3ThreadContext : public ThreadContext
/** Samples the function profiling information. */
virtual void profileSample();
#endif
- /** Returns the instruction this thread is currently committing.
- * Only used when an instruction faults.
- */
- virtual TheISA::MachInst getInst();
/** Copies the architectural registers from another TC into this TC. */
virtual void copyArchRegs(ThreadContext *tc);
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index a1a96933a..0b7a2b172 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -216,13 +216,6 @@ O3ThreadContext<Impl>::profileSample()
#endif
template <class Impl>
-TheISA::MachInst
-O3ThreadContext<Impl>:: getInst()
-{
- return thread->getInst();
-}
-
-template <class Impl>
void
O3ThreadContext<Impl>::copyArchRegs(ThreadContext *tc)
{