diff options
Diffstat (limited to 'src/cpu/o3')
-rw-r--r-- | src/cpu/o3/bpred_unit.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/commit.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/cpu.cc | 11 | ||||
-rw-r--r-- | src/cpu/o3/cpu.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/decode.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/decode_impl.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/fetch.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/fu_pool.cc | 2 | ||||
-rw-r--r-- | src/cpu/o3/fu_pool.hh | 3 | ||||
-rw-r--r-- | src/cpu/o3/iew.hh | 5 | ||||
-rw-r--r-- | src/cpu/o3/iew_impl.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/inst_queue.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/inst_queue_impl.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/lsq.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/lsq_unit.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/mem_dep_unit.cc | 8 | ||||
-rw-r--r-- | src/cpu/o3/mem_dep_unit.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/rename.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/sat_counter.hh | 3 |
19 files changed, 34 insertions, 34 deletions
diff --git a/src/cpu/o3/bpred_unit.hh b/src/cpu/o3/bpred_unit.hh index 84f2dc8c1..8dbba9085 100644 --- a/src/cpu/o3/bpred_unit.hh +++ b/src/cpu/o3/bpred_unit.hh @@ -41,7 +41,7 @@ #include "cpu/pred/tournament.hh" #include "cpu/inst_seq.hh" -class DerivO3CPUParams; +struct DerivO3CPUParams; /** * Basically a wrapper class to hold both the branch predictor diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh index ffc2c16d2..9f76d597f 100644 --- a/src/cpu/o3/commit.hh +++ b/src/cpu/o3/commit.hh @@ -51,10 +51,10 @@ #include "cpu/inst_seq.hh" #include "cpu/timebuf.hh" -class DerivO3CPUParams; +struct DerivO3CPUParams; template <class> -class O3ThreadState; +struct O3ThreadState; /** * DefaultCommit handles single threaded and SMT commit. Its width is diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 49843ee9b..cede7ae18 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -76,7 +76,7 @@ #include "debug/Activity.hh" #endif -class BaseCPUParams; +struct BaseCPUParams; using namespace TheISA; using namespace std; @@ -766,7 +766,8 @@ FullO3CPU<Impl>::activateContext(ThreadID tid, int delay) template <class Impl> bool -FullO3CPU<Impl>::deallocateContext(ThreadID tid, bool remove, int delay) +FullO3CPU<Impl>::scheduleDeallocateContext(ThreadID tid, bool remove, + int delay) { // Schedule removal of thread data from CPU if (delay){ @@ -787,7 +788,7 @@ void FullO3CPU<Impl>::suspendContext(ThreadID tid) { DPRINTF(O3CPU,"[tid: %i]: Suspending Thread Context.\n", tid); - bool deallocated = deallocateContext(tid, false, 1); + bool deallocated = scheduleDeallocateContext(tid, false, 1); // If this was the last thread then unschedule the tick event. if ((activeThreads.size() == 1 && !deallocated) || activeThreads.size() == 0) @@ -804,7 +805,7 @@ FullO3CPU<Impl>::haltContext(ThreadID tid) { //For now, this is the same as deallocate DPRINTF(O3CPU,"[tid:%i]: Halt Context called. Deallocating", tid); - deallocateContext(tid, true, 1); + scheduleDeallocateContext(tid, true, 1); } template <class Impl> @@ -1230,7 +1231,7 @@ FullO3CPU<Impl>::takeOverFrom(BaseCPU *oldCPU) activityRec.reset(); - BaseCPU::takeOverFrom(oldCPU, &icachePort, &dcachePort); + BaseCPU::takeOverFrom(oldCPU); fetch.takeOverFrom(); decode.takeOverFrom(); diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index a874b1e9f..b5050854d 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -79,7 +79,7 @@ class Checkpoint; class MemObject; class Process; -class BaseCPUParams; +struct BaseCPUParams; class BaseO3CPU : public BaseCPU { @@ -401,7 +401,7 @@ class FullO3CPU : public BaseO3CPU /** Remove Thread from Active Threads List && * Possibly Remove Thread Context from CPU. */ - bool deallocateContext(ThreadID tid, bool remove, int delay = 1); + bool scheduleDeallocateContext(ThreadID tid, bool remove, int delay = 1); /** Remove Thread from Active Threads List && * Remove Thread Context from CPU. diff --git a/src/cpu/o3/decode.hh b/src/cpu/o3/decode.hh index 482b4b7fc..663831254 100644 --- a/src/cpu/o3/decode.hh +++ b/src/cpu/o3/decode.hh @@ -36,7 +36,7 @@ #include "base/statistics.hh" #include "cpu/timebuf.hh" -class DerivO3CPUParams; +struct DerivO3CPUParams; /** * DefaultDecode class handles both single threaded and SMT diff --git a/src/cpu/o3/decode_impl.hh b/src/cpu/o3/decode_impl.hh index a523a8b45..7fa25106a 100644 --- a/src/cpu/o3/decode_impl.hh +++ b/src/cpu/o3/decode_impl.hh @@ -38,7 +38,9 @@ #include "debug/Decode.hh" #include "params/DerivO3CPU.hh" -using namespace std; +// clang complains about std::set being overloaded with Packet::set if +// we open up the entire namespace std +using std::list; template<class Impl> DefaultDecode<Impl>::DefaultDecode(O3CPU *_cpu, DerivO3CPUParams *params) diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh index f5d275593..b61ae2c7b 100644 --- a/src/cpu/o3/fetch.hh +++ b/src/cpu/o3/fetch.hh @@ -56,7 +56,7 @@ #include "mem/port.hh" #include "sim/eventq.hh" -class DerivO3CPUParams; +struct DerivO3CPUParams; /** * DefaultFetch class handles both single threaded and SMT fetch. Its diff --git a/src/cpu/o3/fu_pool.cc b/src/cpu/o3/fu_pool.cc index b7c972b09..3f0e46543 100644 --- a/src/cpu/o3/fu_pool.cc +++ b/src/cpu/o3/fu_pool.cc @@ -252,7 +252,7 @@ FUPool::switchOut() } void -FUPool::takeOverFrom() +FUPool::takeOver() { for (int i = 0; i < numFU; i++) { unitBusy[i] = false; diff --git a/src/cpu/o3/fu_pool.hh b/src/cpu/o3/fu_pool.hh index ea4b53e1a..66804b534 100644 --- a/src/cpu/o3/fu_pool.hh +++ b/src/cpu/o3/fu_pool.hh @@ -37,7 +37,6 @@ #include <vector> #include "cpu/op_class.hh" -#include "cpu/sched_list.hh" #include "params/FUPool.hh" #include "sim/sim_object.hh" @@ -162,7 +161,7 @@ class FUPool : public SimObject void switchOut(); /** Takes over from another CPU's thread. */ - void takeOverFrom(); + void takeOver(); }; #endif // __CPU_O3_FU_POOL_HH__ diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh index c58361cd6..d3d1a7dbb 100644 --- a/src/cpu/o3/iew.hh +++ b/src/cpu/o3/iew.hh @@ -54,7 +54,7 @@ #include "cpu/timebuf.hh" #include "debug/IEW.hh" -class DerivO3CPUParams; +struct DerivO3CPUParams; class FUPool; /** @@ -94,9 +94,6 @@ class DefaultIEW typedef typename CPUPol::RenameStruct RenameStruct; typedef typename CPUPol::IssueStruct IssueStruct; - friend class Impl::O3CPU; - friend class CPUPol::IQ; - public: /** Overall IEW stage status. Used to determine if the CPU can * deschedule itself due to a lack of activity. diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh index 698dd15c4..97b41ad9f 100644 --- a/src/cpu/o3/iew_impl.hh +++ b/src/cpu/o3/iew_impl.hh @@ -412,7 +412,7 @@ DefaultIEW<Impl>::takeOverFrom() instQueue.takeOverFrom(); ldstQueue.takeOverFrom(); - fuPool->takeOverFrom(); + fuPool->takeOver(); initStage(); cpu->activityThisCycle(); diff --git a/src/cpu/o3/inst_queue.hh b/src/cpu/o3/inst_queue.hh index eb35fd285..9ceab1525 100644 --- a/src/cpu/o3/inst_queue.hh +++ b/src/cpu/o3/inst_queue.hh @@ -56,7 +56,7 @@ #include "cpu/timebuf.hh" #include "sim/eventq.hh" -class DerivO3CPUParams; +struct DerivO3CPUParams; class FUPool; class MemInterface; @@ -93,8 +93,6 @@ class InstructionQueue // Typedef of iterator through the list of instructions. typedef typename std::list<DynInstPtr>::iterator ListIt; - friend class Impl::O3CPU; - /** FU completion event class. */ class FUCompletion : public Event { private: diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index b2016cc9c..2c0779a03 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -51,7 +51,9 @@ #include "params/DerivO3CPU.hh" #include "sim/core.hh" -using namespace std; +// clang complains about std::set being overloaded with Packet::set if +// we open up the entire namespace std +using std::list; template <class Impl> InstructionQueue<Impl>::FUCompletion::FUCompletion(DynInstPtr &_inst, diff --git a/src/cpu/o3/lsq.hh b/src/cpu/o3/lsq.hh index 731c67ae6..78738fc45 100644 --- a/src/cpu/o3/lsq.hh +++ b/src/cpu/o3/lsq.hh @@ -52,7 +52,7 @@ #include "mem/port.hh" #include "sim/sim_object.hh" -class DerivO3CPUParams; +struct DerivO3CPUParams; template <class Impl> class LSQ { diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index a11d95f3b..4a2369de3 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -52,7 +52,7 @@ #include "mem/packet.hh" #include "mem/port.hh" -class DerivO3CPUParams; +struct DerivO3CPUParams; /** * Class that implements the actual LQ and SQ for each specific diff --git a/src/cpu/o3/mem_dep_unit.cc b/src/cpu/o3/mem_dep_unit.cc index ac0db4784..234a6f9c4 100644 --- a/src/cpu/o3/mem_dep_unit.cc +++ b/src/cpu/o3/mem_dep_unit.cc @@ -32,10 +32,6 @@ #include "cpu/o3/mem_dep_unit_impl.hh" #include "cpu/o3/store_set.hh" -// Force instantation of memory dependency unit using store sets and -// O3CPUImpl. -template class MemDepUnit<StoreSet, O3CPUImpl>; - #ifdef DEBUG template <> int @@ -47,3 +43,7 @@ template <> int MemDepUnit<StoreSet, O3CPUImpl>::MemDepEntry::memdep_erase = 0; #endif + +// Force instantation of memory dependency unit using store sets and +// O3CPUImpl. +template class MemDepUnit<StoreSet, O3CPUImpl>; diff --git a/src/cpu/o3/mem_dep_unit.hh b/src/cpu/o3/mem_dep_unit.hh index 7d00369d3..ce5a62ef8 100644 --- a/src/cpu/o3/mem_dep_unit.hh +++ b/src/cpu/o3/mem_dep_unit.hh @@ -49,7 +49,7 @@ struct SNHash { } }; -class DerivO3CPUParams; +struct DerivO3CPUParams; template <class Impl> class InstructionQueue; diff --git a/src/cpu/o3/rename.hh b/src/cpu/o3/rename.hh index e2472a62d..a5c83dfea 100644 --- a/src/cpu/o3/rename.hh +++ b/src/cpu/o3/rename.hh @@ -37,7 +37,7 @@ #include "config/the_isa.hh" #include "cpu/timebuf.hh" -class DerivO3CPUParams; +struct DerivO3CPUParams; /** * DefaultRename handles both single threaded and SMT rename. Its diff --git a/src/cpu/o3/sat_counter.hh b/src/cpu/o3/sat_counter.hh index 7dd840f31..17ff8546b 100644 --- a/src/cpu/o3/sat_counter.hh +++ b/src/cpu/o3/sat_counter.hh @@ -65,7 +65,8 @@ class SatCounter * @param initial_val Starting value for each counter. */ SatCounter(unsigned bits, uint8_t initial_val) - : initialVal(initialVal), maxVal((1 << bits) - 1), counter(initial_val) + : initialVal(initial_val), maxVal((1 << bits) - 1), + counter(initial_val) { // Check to make sure initial value doesn't exceed the max // counter value. |