diff options
Diffstat (limited to 'src/cpu/o3')
| -rw-r--r-- | src/cpu/o3/O3CPU.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py index 4a994f07f..89744e98a 100644 --- a/src/cpu/o3/O3CPU.py +++ b/src/cpu/o3/O3CPU.py @@ -181,14 +181,14 @@ class DerivO3CPU(BaseCPU): def addCheckerCpu(self): if buildEnv['TARGET_ISA'] in ['arm']: - from m5.objects.ArmTLB import ArmTLB + from m5.objects.ArmTLB import ArmDTB, ArmITB self.checker = O3Checker(workload=self.workload, exitOnError=False, updateOnError=True, warnOnlyOnLoadError=True) - self.checker.itb = ArmTLB(size = self.itb.size) - self.checker.dtb = ArmTLB(size = self.dtb.size) + self.checker.itb = ArmITB(size = self.itb.size) + self.checker.dtb = ArmDTB(size = self.dtb.size) self.checker.cpu_id = self.cpu_id else: |