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-rw-r--r--src/cpu/o3/cpu.cc27
-rw-r--r--src/cpu/o3/cpu.hh2
-rw-r--r--src/cpu/o3/dyn_inst.hh1
-rw-r--r--src/cpu/o3/dyn_inst_impl.hh10
4 files changed, 0 insertions, 40 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index ba6e80ff2..50de81b2a 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -918,33 +918,6 @@ FullO3CPU<Impl>::removeThread(ThreadID tid)
}
template <class Impl>
-bool
-FullO3CPU<Impl>::simPalCheck(int palFunc, ThreadID tid)
-{
-#if THE_ISA == ALPHA_ISA
- auto *stats = dynamic_cast<AlphaISA::Kernel::Statistics *>(
- this->thread[tid]->kernelStats);
- if (stats)
- stats->callpal(palFunc, this->threadContexts[tid]);
-
- switch (palFunc) {
- case PAL::halt:
- halt();
- if (--System::numSystemsRunning == 0)
- exitSimLoop("all cpus halted");
- break;
-
- case PAL::bpt:
- case PAL::bugchk:
- if (this->system->breakpoint())
- return false;
- break;
- }
-#endif
- return true;
-}
-
-template <class Impl>
void
FullO3CPU<Impl>::switchRenameMode(ThreadID tid, UnifiedFreeList* freelist)
{
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index bd1479acc..c754fe8cf 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -385,8 +385,6 @@ class FullO3CPU : public BaseO3CPU
/** Traps to handle given fault. */
void trap(const Fault &fault, ThreadID tid, const StaticInstPtr &inst);
- bool simPalCheck(int palFunc, ThreadID tid);
-
/** Check if a change in renaming is needed for vector registers.
* The vecMode variable is updated and propagated to rename maps.
*
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 9b6c1fbb8..131ffd258 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -250,7 +250,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
}
/** Traps to handle specified fault. */
void trap(const Fault &fault);
- bool simPalCheck(int palFunc) override;
/** Emulates a syscall. */
void syscall(int64_t callnum, Fault *fault) override;
diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index 5fb597379..fbeb3c291 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -192,16 +192,6 @@ BaseO3DynInst<Impl>::trap(const Fault &fault)
}
template <class Impl>
-bool
-BaseO3DynInst<Impl>::simPalCheck(int palFunc)
-{
-#if THE_ISA != ALPHA_ISA
- panic("simPalCheck called, but PAL only exists in Alpha!\n");
-#endif
- return this->cpu->simPalCheck(palFunc, this->threadNumber);
-}
-
-template <class Impl>
void
BaseO3DynInst<Impl>::syscall(int64_t callnum, Fault *fault)
{